International Journal of Computer Applications |
Foundation of Computer Science (FCS), NY, USA |
Volume 187 - Number 27 |
Year of Publication: 2025 |
Authors: Mohammad Nazma Sultana, S. Ravi |
![]() |
Mohammad Nazma Sultana, S. Ravi . FPGA Implementation of Low Power SLAM Accelerated Core. International Journal of Computer Applications. 187, 27 ( Aug 2025), 25-30. DOI=10.5120/ijca2025925467
Simultaneous Localization and Mapping (SLAM) is critical for autonomous systems because it enables real-time environmental mapping and navigation. Implementing SLAM algorithms in hardware, particularly on low-resource platforms, poses challenges owing to the computational complexity of operations such as matrix multiplications and quaternion transformations. This study introduces a novel accelerated core for SLAM algorithms that is optimized for hardware resource efficiency and high computational performance. By leveraging dedicated instruction set and memory reuse strategies, this core supports various SLAM approaches. The experimental results demonstrate the coprocessor's high precision, low resource consumption, and adaptability to multiple SLAM algorithms.