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Reseach Article

Novel VLSI Architectures for Image Segmentation and Edge Detection Algorithm

by Prachi Dewan, Rekha Vig, Neeraj Shukla, B. K. Das
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 149 - Number 10
Year of Publication: 2016
Authors: Prachi Dewan, Rekha Vig, Neeraj Shukla, B. K. Das
10.5120/ijca2016911577

Prachi Dewan, Rekha Vig, Neeraj Shukla, B. K. Das . Novel VLSI Architectures for Image Segmentation and Edge Detection Algorithm. International Journal of Computer Applications. 149, 10 ( Sep 2016), 32-36. DOI=10.5120/ijca2016911577

@article{ 10.5120/ijca2016911577,
author = { Prachi Dewan, Rekha Vig, Neeraj Shukla, B. K. Das },
title = { Novel VLSI Architectures for Image Segmentation and Edge Detection Algorithm },
journal = { International Journal of Computer Applications },
issue_date = { Sep 2016 },
volume = { 149 },
number = { 10 },
month = { Sep },
year = { 2016 },
issn = { 0975-8887 },
pages = { 32-36 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume149/number10/26036-2016911577/ },
doi = { 10.5120/ijca2016911577 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T23:54:25.543226+05:30
%A Prachi Dewan
%A Rekha Vig
%A Neeraj Shukla
%A B. K. Das
%T Novel VLSI Architectures for Image Segmentation and Edge Detection Algorithm
%J International Journal of Computer Applications
%@ 0975-8887
%V 149
%N 10
%P 32-36
%D 2016
%I Foundation of Computer Science (FCS), NY, USA
Abstract

Field programmable gate arrays (FPGA) are the devices which can be easily employed for image and video processing applications. FPGA implementation is always faster than any other digital signal processor due to its parallel image processing capabilities. This paper proposes the hardware co-simulation model of different traffic signs carried out using Xilinx System Generator tool. The proposed system uses image pre-processing, color conversion, thresholding and edge detection of still grayscale images taken from a distance of 50m. Experimental results show that hardware co-simulation was successful in SPARTAN-3E DSP xc6slx45-3csg324 development board operating at 100MHz system clock.

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Index Terms

Computer Science
Information Sciences

Keywords

FPGA Hardware Co-Simulation Xilinx System Generator (XSG) Simulink.