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Design and Analysis of Low Power Level Shifter in IC Applications
| International Journal of Computer Applications |
| Foundation of Computer Science (FCS), NY, USA |
| Volume 141 - Number 11 |
| Year of Publication: 2016 |
| Authors: Meenu Singh, Priyanka Goyal, Ajeet Kumar Yadav |
10.5120/ijca2016909844
|
Meenu Singh, Priyanka Goyal, Ajeet Kumar Yadav . Design and Analysis of Low Power Level Shifter in IC Applications. International Journal of Computer Applications. 141, 11 ( May 2016), 6-10. DOI=10.5120/ijca2016909844
Abstract
In this paper, level Shifter circuit is analyzed which is efficient for converting low-voltage digital input signal into high-voltage digital output signal. The circuit has a diagnostic current generation device by using a logic error correction circuit that work by identifying the input and output logic level .When input signal changes, circuit produce low power operation only because it can dissipate power at the operating current. For the comparative analysis of this error correction Level Shifter different methodologies are used which named as biasing for the level Shifter. Result shows that the circuit converts a 0.4-V input signal to 3-V output signal. Simulation results are carried out by using 0.35μm CMOS technology. Power dissipation is 34nW for a 0.4V at 10 kHz input pulse.
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