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BER Analysis for Different Number of Inserted Flip-Flop and Latches
| International Conference on Electronics, Information and Communication Engineering |
| Foundation of Computer Science USA |
| ICEICE - Number 1 |
| December 2011 |
| Authors: Devendra Giri, Gagnesh Kumar |
| a8dd88ba-80a8-4a07-8c15-f0315f06cf90 |
Devendra Giri, Gagnesh Kumar . BER Analysis for Different Number of Inserted Flip-Flop and Latches. International Conference on Electronics, Information and Communication Engineering. ICEICE, 1 (December 2011), 34-37.
Abstract
In this paper a detailed analysis for how the number of flip-flops and latches inserted are effecting BER and repeater size with wire pipelining is performed. Since number of flip-flops, latches and repeater sizes cannot scaled down beyond a certain limit due to the solidity requirement, which is determined by maximum allowable bit error rate.
References
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