International Conference on Communication, Computing and Information Technology |
Foundation of Computer Science USA |
ICCCMIT - Number 2 |
February 2013 |
Authors: Vandana Shukla, O. P. Singh, G. R. Mishra, R. K. Tiwari |
85f01f3c-0584-46c8-8aa4-ace4c1feacee |
Vandana Shukla, O. P. Singh, G. R. Mishra, R. K. Tiwari . Design of a 4-bit 2s Complement Reversible Circuit for Arithmetic Logic Unit Applications. International Conference on Communication, Computing and Information Technology. ICCCMIT, 2 (February 2013), 1-5.
Nowadays reversible circuit designing is the emerging area of research. This design strategy aims towards the formation of digital circuits with ideally zero power dissipation. In this paper we have proposed a new reversible logic module to design a 4-bit binary 2's complement circuit. This complement circuit using reversible logic can be used to design other low loss Arithmetic circuit. Proposed circuits have been simulated using ModelSim and implemented using Xilinx Spartan2 FPGA platform.