This paper presents the design of non-sequential phase detector using different XOR gates and compares the results with conventional circuit. Phase detector circuit has been modified using transmission gate logic XOR gate and 4T XNOR gate. The simulation results are focused on accounting the frequency operation and power dissipation of these phase detectors. The results shown in this paper are obtained using 0. 35?m CMOS technology on SPICE simulator with 3. 3V supply voltage

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Phase Locked Loops (pll) Are Most Widely Used For Synchronization Of Clock Phase Digital Circuits And High Performance Microprocessor System [1]. The Phase Detector Is The Main Part Of The Pll And There Is An Increasing Demand Of High Frequency Operation Pll. The Action Of Phase Detector Enables The Phase Differences In The Loop To Be Detected And The Resultant Error Voltage To Be Produced. A Phase Detector Can Monitor The Difference Between Input Data Frequency And The Voltage Controlled Oscillator Output And Generate An Up Signal If Input Data Leads The Clock Output Of Vco And A Down If Input Data Lags The Clock [2]. The Most Desirable Feature Of A Phase Detector Is To Have Zero Dead Zone Which Is Responsible For Increasing Phase Noise. Dead Zone Occurs When The Phase Detector Will Not Able To Detect Any Phase Error When The Phase Error Is Present. Various Types Of Phase Detector Described In Literature Which Are Applicable For Random Data Applications. The Hogge's [3] And Alexander [4] Phase Detectors Have Been Most Widely Used. There Are Some Performance Limitations In These Sequential Phase Detectors. Here In This Paper Modification In Non-sequential Circuits Has Been Done With Transmission Gate Logic Xor Gate And 4t Xnor Gate. Further Different Phase Detectors Are Compared With Its Phase Characteristics And Power Dissipation. Rest Of Paper Is Organized As: In Section Ii The Structure And Operation Of Phase Detector With Complemtgl Xor Gatentary Pass Transistor Logic (cpl) Is Explained. In Section Iii The Modifications Have Been Proposed With Xor And Xnor Gates. In Section Iv The Results Have Been Described. Finally The Conclusions Have Been Drawn In Section V.