National Workshop-Cum-Conference on Recent Trends in Mathematics and Computing 2011 |
Foundation of Computer Science USA |
RTMC - Number 15 |
May 2012 |
Authors: Geetika, Amardeep Singh |
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Geetika, Amardeep Singh . Partitioning VLSI Circuits. National Workshop-Cum-Conference on Recent Trends in Mathematics and Computing 2011. RTMC, 15 (May 2012), 26-28.
Partitioning is a critical area of VLSI CAD. In order to build complex digital logic circuits it is often essential to sub-divide a circuit into smaller parts. Circuit partitioning plays an important role in physical design automation of very large scale integration (VLSI) chips. In VLSI circuit partitioning the problem of obtaining minimum cut is of prime importance. To enhance other criteria like power, delay and area in addition to minimum cit is included.