Recent Trends in Electronics and Communication 2013 |
Foundation of Computer Science USA |
RTEC - Number 1 |
December 2013 |
Authors: Veepsa Bhatia, Neeta Pandey, Asok Bhattacharyya |
8b681451-9629-4a88-b7e9-e890c4c37ef5 |
Veepsa Bhatia, Neeta Pandey, Asok Bhattacharyya . Performance Comparison of an Algorithmic Current-Mode ADC Implemented using Different Current Comparators. Recent Trends in Electronics and Communication 2013. RTEC, 1 (December 2013), 14-18.
In this paper a 4-bit algorithmic current mode Analog-to-Digital Converter (ADC) has been implemented. A vital component of this ADC is a current comparator. We have simulated three popular structures of current comparators that can be used to implement this ADC and compared their performance. The circuit has been implemented using 0. 18 ?m CMOS technology with a supply voltage of 1. 8V.