Gate Diffusion input (GDI) a new technique of designing low-power digital combinational circuit is described. This technique allows reduction in power consumption, transistor count, propagation delay and area of digital circuits. This approach allows implementation of a wide range of complex logic functions using only two transistors. GDI proposes and compared with traditional CMOS. Comparison of GDI transistor count with CMOS is presented. . Simulation result shows that the propose GDI has better performance in terms of power consumption and transistor count in compared to CMOS design. In our paper, we designed the 4*4 array multiplier based on GDI and the simulations are performed by CADENCE VIRTUOSO based on 180nm CMOS technology with the supply voltage of 0. 7V.

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Gate Diffusion Input Cmos Full Adder Low Power Multiplier