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Monitor Interfacing through Soft Core Processor
| National Conference on Innovative Paradigms in Engineering & Technology 2013 |
| Foundation of Computer Science USA |
| NCIPET2013 - Number 2 |
| December 2013 |
| Authors: Gendlal M. Vaidya, D. V. Padole |
| 84f6a18e-df8b-4131-9c5e-563570e4e139 |
Gendlal M. Vaidya, D. V. Padole . Monitor Interfacing through Soft Core Processor. National Conference on Innovative Paradigms in Engineering & Technology 2013. NCIPET2013, 2 (December 2013), 32-35.
Abstract
This paper presents co designing of software and hardware which is used for the soft core processor based applications. The ALTERA's SOPC (system on programmable chip) development tool is used to implement the system, which contains an NIOS II processor. To interface the monitor, we need the ALTERA's DE1 board on which the RS232 serial port is available. It also provides Field Programmable Gate Array (FPGA) which is loaded first with the Nios II soft core processor and then Real Time Operating System (RTOS) installed on this FPGA based architecture contained with the soft core processor.
References
- C. Snyder. (2000) "FPGA Processor Cores Get Serious," Cahners Microprocessor Report. http://www. MPRonline. com
- Julio Perez Acle, Matteo Sonza Reorda, Massimo Violante "Implementing a safe embedded computing system in SRAM-based FPGAs using IP cores: A case study based on the Altera NIOS-II soft processor" in the proceeding of IEEE 2011
- P. C. Eng, M. Khalil-Hani " FPGA-Based Embedded Hand Vein Biometric Authentication System" in the Proc of TENCON 2009, IEEE 2009
- Cai Ken, Liang Xiaoying, Liu Chuanju "SOPC based flexible architecture for JPEG enconder" in the Proceedings of 2009 4th International Conference on Computer Science & Education, 2009 IEEE P. Yiannacouras, J. Rose, and J. G. Steffan, "The micro architecture of FPGA based soft processors, in Proc. Int. Conf. CASES, pp 202–212 2005
- P. Metzgen,"Optimizing a high performance32-bit processor for programmable logic," in International Symposium on System-on-Chip2004. IEEE Computer Society, 2004,p. 13
- Nios II, Altera. [Online]. Available: http://www. altera. com/products/ip/processors/nios2
- Pico Blaze 8-bit Embedded Microcontroller User Guide for Spartan- 3,Virtex-II and Virtex-II Pro FPGAs, Xilinx, Inc. , November 2005
- Kentaro Sano "SW and HW Co-design of Connect6 Accelerator with Scalable Streaming Cores" IEEE 2011.
- MicroBlaze Processor Reference Guide Embedded Development Kit EDK8. 2i, Xilinx, Inc, June2011.
- R. Lepetenok, AVR Core, opencores. org, http://www. opencores. com/projects/avr_core/,March 2007
- LEON2 Processor User's Manual, Gaisler Research, July 2005.
- NIOS-II Processor Reference Manual, Altera Corporation, San Jose, CA USA, 2009
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