Now-a-days, the systems are coming with the high speed processors. With the development in the processors, the CPU performance is increasing day-by-day and making applications such as data mining, data warehousing, and e-business commonplace. This growth in computational power requires that the I/O subsystem should be able to deliver the data needed by the processor subsystem at the rate at which is it needed. In the past couple of years, it has become clear that the current shared bus-based architecture will become the bottleneck of the servers that host these powerful but demanding applications. The Peripheral Component Interconnect (PCI) bus, which is a dominant bus, commonly used in both desktop and server machines for attaching I/O peripherals to the CPU/memory Units. Today’s desktop machines have lots of capacity available with the PCI bus in the typical configuration, but server machines are starting to hit the upper limits of the shared bus architecture. To resolve this limitation on the bandwidth of the PCI bus, a number of solutions are becoming available in the market as interim solutions such as PCI-X and PCI DDR. But these versions also fail to some extent. For ex: The PCI-X specification allows for a 64-bit version of the bus operating at the clock rate of 133 MHz, but this is achieved by ceasing some of the timing constraints. Because of the shared bus nature of these versions, the bus forces it to lower its fanout in order to achieve the high clock rate of 133 MHz. So, despite the temporary resolution of the PCI bandwidth limitation through these new upgrade technologies, there is a long term solution needed that cannot rely on shared bus architecture. InfiniBand breaks through the bandwidth and fanout limitations of the PCI bus by migrating from the traditional shared bus architecture into switched fabric architecture. The InfiniBand™ Architecture (IBA) is an industry standard that defines a new high-speed switched fabric subsystem designed to connect processor nodes and I/O nodes to form a system area network. These new interconnect method moves away from the local transaction-based I/O model across busses to a remote message-passing model across channels. The architecture is independent of the host operating system (OS) and the processor platform. IBA provides both reliable and unreliable transport mechanisms in which messages are enqueued for delivery between end systems. Hardware transport protocols are defined that support reliable and unreliable messaging (send/receive), and memory manipulation semantics (e.g., RDMA read/write) without software intervention in the data transfer path.

1. InfiniBand Architecture Specification Volume 1 Release 1.2
2. KPIT InfiniBand SRP Device Driver Project Documents
3. SRP Protocol Specifications Version 1.6

InfiniBand Networking