Multi-core designs have become commonplace in the processor market, and are hence a major focus in modern computer architecture research. Thus, for both product development and research, multiple core processor simulation environments are necessary. Multi-core computer offer a new parallel computing platform with high performance-price ratio and small volume to parallel simulation. Existing parallel simulator especially PDES simulators commonly run on parallel computers or clusters with Linux or Unix OS. The prices of super computer and large scale cluster are too high to be afforded, which limits the extensive popularization of PDES. This paper discusses a brief overview of multi-core processors and existing approaches to Parallel Discrete Event Simulation based on multi-core computer platform. A novel approach to proposed to explore the Parallel Discrete Event Simulation based on multi-core computer platform that can run on desktop with windows OS directly.

1. Jia-an, W. Cheng-shan, Wu Ai-guo,” A study of power system parallel simulation methods based on multi-core multithreaded processor platforms” International Conference on 15-17 April 2011.
2. Wikipedia,“Moore'sLaw”, http://upload.wikimedia.org/wikipedia/commons/0/06/Moore_Law_diagram_(2004).png.
3. K. Asanovic, R. Bodik, B. C. Catanzaro, J. J. Gebis,P. Husbands, K. Keutzer, D. A. Patterson, W. L. Plishker,J. Shalf, S. W. Williams, and K. A. Yelick, “The landscape of parallel computing research: A view from berkeley,” electrical Engineering and Computer Sciences, University of California at Berkeley, Tech. Rep. UCB/EECS-2006-183, December 2006.
4. Sannella, M. J. 1994 Constraint Satisfaction and S. Vangal, J. Howard, G. Ruhl, S. Dighe, H. Wilson,J. Tschanz, D. Finan, P. Iyer, A. Singh, T. Jacob, S. Jain, S. Venkataraman, Y. Hoskote, and N. Borkar. An 80-Tile 1.28TFLOPS Network-on-Chip in 65nm CMOS. In Proceedingsof ISSCC, 2007.
5. Juan del Cuvillo, Weirong Zhu, Ziang Hu, and Guang R. Gao. “Toward a software infrastructure for the cyclops-64 cellular architecture”. In Proceedings of the 20th In-ternational Symposium on High-Performance Computing in an Advanced Collaborative.
6. K. Pedretti, S. Kelly, and M. Levenhagen, "Summary of Multi-Core Hardware and Programming Model Investigations,"Sandia National Laboratories, Albuquerque, New Mexico, USA, Technical Report SAND2008-3205, 2008.
7. R M. Fujimoto. Parallel discrete event simulation. Commun. ACM, 33(10):30–53, 1990.
8. D. Jefferson, “Virtual time,” ACM Transactions on Programming Languages and Systems, vol. 7, no. 3, pp.405–425, Jul. 1985
9. J. Reinders, Intel Threading Building Blocks. US:O'Reilly, 2007.
10. Jason Liu Parallel discrete event simulation,” School of Computing and Information Sciences Florida International University February 9, 2009
11. D. E. Martin, P. A. Wilsey, R. J. Hoekstra, R. J. Hoekstra, et al., "Redesigning the WARPED Simulation Kernel for Analysis and Application Development," in
12. Jefferson DR. Virtual time. ACM Trans. Program. Lang. Syst. 1985; 7(3):404–425, doi:10.1145/3916.3988.
13. Fujimoto, "Performance of Time Warp under Synthetic Workloads," Proceedings of the SCS Multiconference on Distributed Simulation, vol. 22, pp. 23-28, Jan. 1990
14. handy KM, Misra J. Asynchronous distributed simulation via a sequence of parallel computations. Commun. ACM 1981; 24(4):198–206, doi:10.1145/358598.358613
15. Nianle Su, Hongtao Hou, Feng Yang, Qun Li, and Weiping Wang, “Optimistic Parallel Discrete Event Simulation Based on Multi-core Platform and its Performance Analysis” 2009 IEEE.
16. K. M. Chandy and J. Misra. Distributed simulation: A case study in design and verification of distributed programs. IEEE Transactions on Software Engineering, SE-5(5):440–452, May 197.
17. M. Chidester and A. George, “Parallel Simulation of Chip Multiprocessor Architectures,” ACM Transactions on Modeling andComputer Simulation, vol. 12, no. 3, pp. 176–200, July 2002.
18. K. Barr et al., “Simulating a Chip Multiprocessor with a Symmetric Multiprocessor,” in Proc. of the Boston Area Architecture Workshop, Jan. 2005.

Parallel Discrete