The week's pick
Reseach Article
An overview and Analysis of Low Power SRAM Design
| 2nd National Conference on Innovative Paradigms in Engineering and Technology (NCIPET 2013) |
| Foundation of Computer Science USA |
| NCIPET - Number 1 |
| November 2013 |
| Authors: R. A. Burange, G. H. Agrawal |
| 1754a17d-5169-41c0-8c09-5a95c6908182 |
R. A. Burange, G. H. Agrawal . An overview and Analysis of Low Power SRAM Design. 2nd National Conference on Innovative Paradigms in Engineering and Technology (NCIPET 2013). NCIPET, 1 (November 2013), 33-35.
Abstract
Static Random Access memory (SRAM) is a matrix of static volatile memory cell. Different techniques used for power optimization and Challenges regarding reduction of static and dynamic powers are discussed. Power reduction of other supporting circuits like Sense amplifier is analyzed with respect to a standard design.
References
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- "A Low-Power SRAM Using Bit-Line Charge-Recycling for Read and Write Operations" by Byung-Do Yang, IEEE Journal of solid-state circuits, vol. 45, No. 10,pp. 2173 - 2183, October 2010.
- "Design of a High Performance and Low Power 1Kb 6T SRAM using Bank Partitioning Method" by Kumkum Verma, Sanjay Kumar Jaiswal and Mohammad Ayoub Khan, 2011 International Conference on Multimedia, Signal Processing and Communication Technologies, pp. 56 -59.
- "A Low-Power Embedded SRAM for Wireless Applications" by Stefan Cosemans, Student Member, IEEE, Wim Dehaene, Senior Member, IEEE, and Francky Catthoor, Fellow, IEEE, Journal of solid-state circuits, vol. 42, No. 7, pp. 1607 -1617 , July 2007
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