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Reseach Article

Modelling of Compact Models of Carbon Nanotube Field Effect Transistors with VHDL-AMS

Published on April 2018 by Priyanka Tyagi, Aakansha Garg
IPR, Future Technology, Optimization and Management
Foundation of Computer Science USA
NCIFTOM2016 - Number 1
April 2018
Authors: Priyanka Tyagi, Aakansha Garg
9c0ff6c5-4a41-4a3c-8beb-4e766a53fbc4

Priyanka Tyagi, Aakansha Garg . Modelling of Compact Models of Carbon Nanotube Field Effect Transistors with VHDL-AMS. IPR, Future Technology, Optimization and Management. NCIFTOM2016, 1 (April 2018), 15-20.

@article{
author = { Priyanka Tyagi, Aakansha Garg },
title = { Modelling of Compact Models of Carbon Nanotube Field Effect Transistors with VHDL-AMS },
journal = { IPR, Future Technology, Optimization and Management },
issue_date = { April 2018 },
volume = { NCIFTOM2016 },
number = { 1 },
month = { April },
year = { 2018 },
issn = 0975-8887,
pages = { 15-20 },
numpages = 6,
url = { /proceedings/nciftom2016/number1/29189-1605/ },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Proceeding Article
%1 IPR, Future Technology, Optimization and Management
%A Priyanka Tyagi
%A Aakansha Garg
%T Modelling of Compact Models of Carbon Nanotube Field Effect Transistors with VHDL-AMS
%J IPR, Future Technology, Optimization and Management
%@ 0975-8887
%V NCIFTOM2016
%N 1
%P 15-20
%D 2018
%I International Journal of Computer Applications
Abstract

This paper related to modelling and simulation of the carbon nanotube field effect transistor (CNTFET). There are two compact models for CNTFET's, the first which behaves like a MOSFET is known as the classical behaviour model and the other one is schottky barrier CNTFET is known as ambipolarbehaviourmodel . Like MOSFET devices these models implemented in VHDL-AMS. MOSFETs are modelled in VHDL which is a hardware description language and results are simulated on the simulators. CNTFET models are implemented on VHDL-AMS and have been compared with numerical simulation.

References
  1. P. Avouris, J. Appenzeller, R. Martel, andS. J. Wind. carbon nanotube electronics. proc. of IEEE, 91(11):1772–1784, 2003.
  2. C. Enz, F. Krummenacher, and E. Vittoz. An analytical MOS transistor model validin all regions of operation and dedicated tolow-voltage and low-current applications. journal of AICSP, pages 83–114, 1995.
  3. D. J. Frank, R. H. Dennard, E. Nowak, P. M. Solomon, Y. Taur, and H-S. P. Wong. Device scaling limits of Si MOSFETs andtheir application dependencies. Proc. of [PLV05] IEEE, 89(3):259–288, 2001.
  4. J. G. Fossum, L. Ge, M-H. Chiang, V. P. Trivedi, M. M. Chowdhury, L. Mathew, G. O. Workman, and B-Y. Nguyen. A process/physics-based compact model for nonclassical CMOS device and circuit de-sign. Solid-State Electron. , 48:919–926, 2004.
  5. J. Guo, S. Datta, and M. Lundstrom. A numerical study of scaling issues for schottky-barrier carbon nanotube tran-sistors. IEEE Trans. Electron Devices, 51(2):172–177, 2004.
  6. L. Ge and J. G. Fossum. Analytical model-ing of quantization and volume invesion in thin Si-film double-gate MOSFETs. IEEE Trans. Electron Devices, 49(2):287–294, 2002.
  7. J. Guo, M. Lundstrom, and S. Datta. Performance projections for ballistic car-bon nanotube field-e?ect transistors. App. Phys. Letters, 80(17):3192–3194, 2002.
  8. International technology roadmap for semiconductors 2004 update. [Online]. Available: http://public. itrs. net/ [May 2005].
  9. J. Knoch, S. Mantl, and J. Appen-zeller. Comparison of transport propoer-ties in carbon nanotube field-e?ect tran-sistors with Schottky contacts and doped source/drain contacts. Solid-State Elec-tron. , 49:73–76, 2005.
  10. NANOHUB online simulations and more, CNT bands. [Online]. Available: http://www. nanohub. org [April 2006].
  11. F. Pr´egaldiny, F. Krummenacher, B. Di-agne, F. Pˆecheux, J-M. Sallese, and C. Lallement. Explicit modelling of the double-gate MOSFET with VHDL-AMS.
  12. Int. Journ. of Numerical Modelling: Elec. Networks, Devices and Fields, 19(3):239– 256, 2006.
  13. F. Pr´egaldiny, F. Krummenacher, J-M. Sallese, B. Diagne, and C. Lallement. An explicit quasi-static charge-based compact model for symmetric DG MOSFET. InNSTI-Nanotech 2006, WCM, volume 3, pages 686–691, 2006. ISBN 0-9767985-8-1. .
  14. F. Pˆecheux, C. Lallement, and A. Va-choux. VHDL-AMS and Verilog-AMS-static charge-based compact model for symmetric DG MOSFET. InNSTI-Nanotech 2006, WCM, volume 3,pages 686–691, 2006. ISBN 0-9767985-8-1.
  15. F. Pˆecheux, C. Lallement, and A. Va-choux. VHDL-AMS and Verilog-AMSasalternative hardware description languages for e?cient modelling of multi-discipline systems. IEEE Trans. Computer-Aided Design, 24(2):204–224, 2005.
  16. Raychowdhury, S. Mukhopadhyay, andRoy. A circuit-compatible model of bal-listic carbon nanotube field-e?ect transis-tors. IEEE Trans. Computer-Aided De-sign, 12(10):1411–1420, 2004.
  17. Raychowdhury and K. Roy. Carbonnanotube-based voltage-mode multiple-valued logic design. IEEE Trans. Nan-otechno. , 4(2):168–179, 2005.
  18. R. Sordan,K. Balasubramanian,M. Burghard, and K. Kern. Exclusive-ORgate with a single carbon nanotube. App. Phys. Letters, 88, 2006. 053119.
  19. J-M. Sallese, F. Krummenacher, F. Pr´e-galdiny, C. Lallement, A. Roy A, andC. Enz. A design oriented charge-basedcurrent model for symmetric DG MOSFET and its correlation with the EKV formalism. Solid-State Electron. , 49(3):485–489, 2005.
  20. J-M. SalleseandA. S. Porret. Anovelapproach to charge-based non-quasi-staticmodel of the MOS transistor valid in allmodes of operation. Solid-State Electron44:887–894, 2000.
  21. Y. Taur. Ananalytical solution toa double-gate MOSFET with undopedbody. IEEE Electron Device Lett. ,21(5):245–247, 2000.
  22. Y. Taur, X. Liang, W. Wang, and H. Lu. Acontinuous, analytic drain-current modelfor DG MOSFETs. IEEE Electron DeviceLett. , 25(2):107–109, 2004.
Index Terms

Computer Science
Information Sciences

Keywords

Cntfet Vhdl Mosfet