The week's pick
Reseach Article
Design of Multiplier based Low Power PID Controllers
| National Conference on Information and Communication Technologies |
| Foundation of Computer Science USA |
| NCICT2015 - Number 1 |
| September 2015 |
| Authors: V. Priya, A. Abinaya |
| 361b0849-0b63-42d7-acf7-665331c801c0 |
V. Priya, A. Abinaya . Design of Multiplier based Low Power PID Controllers. National Conference on Information and Communication Technologies. NCICT2015, 1 (September 2015), 34-37.
Abstract
The increasing industrial growth needs its system to be fully controllable. Such control systems are almost composed of VLSI components such as adders, multipliers and accumulators. This paper analyzes two MAC units with array, booth algorithms and those blocks are incorporated in PID controller architecture. Comparisons are made with power consumption of each architecture. The simulations are done in Modelsim and power results are synthesized using Xilinx ISE. The results suggest that the PID controller with booth based MAC unit and PID architecture consumes less power when compared to array based architectures.
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