Hardware implementation of image processing algorithms is becoming the need on the day due to advancement in handheld devices, medical imaging systems, etc. Power management in those applications is a major concern. The multiplier can be one of the best solutions for the power management problem. This paper deals with a new inexact 4-2 compressor for exploitation in a multiplier. This design is used to improve the multiplier features like power and transistor count. Two different multipliers, utilizing the inexact 4-2 compressor are proposed and analyzed for an unsigned Dadda multiplier. Prevalent simulation results have been evaluated and utilizing image processing as an application for inexact compressor. The results show that the proposed design achieve significant accuracy improvement together with major reduction in power and number of gates and it is compared to exact 4-2 compressor. The proposed multiplier fallout an excellent value for image blending with respect to PSNR.

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Unsigned Dadda Multiplier Inexact Compressor.