We apologize for a recent technical issue with our email system, which temporarily affected account activations. Accounts have now been activated. Authors may proceed with paper submissions. PhDFocusTM
CFP last date
20 November 2024
Call for Paper
December Edition
IJCA solicits high quality original research papers for the upcoming December edition of the journal. The last date of research paper submission is 20 November 2024

Submit your paper
Know more
The week's pick
Responsive image
Improved Shuffled Frog Leaping Algorithm with Self-Adaptive Shuffling for Fuzzy Logic PD+G Controller Optimization in Robotic Manipulators

Duc Hoang Nguyen
Random Articles
Reseach Article

Realization of Analog Circuits using Double Gate MOSFET at 32nm CMOS Technology

Published on June 2015 by Mohammed Maqsood, S.p. Venu Madhava Rao
journal_cover_thumbnail

National Conference on Emerging Trends in Advanced Communication Technologies
Foundation of Computer Science USA
NCETACT2015 - Number 2
June 2015
Authors: Mohammed Maqsood, S.p. Venu Madhava Rao
bef8b62d-baaa-4891-8035-ec8b34beda27

Mohammed Maqsood, S.p. Venu Madhava Rao . Realization of Analog Circuits using Double Gate MOSFET at 32nm CMOS Technology. National Conference on Emerging Trends in Advanced Communication Technologies. NCETACT2015, 2 (June 2015), 21-26.

@article{
author = { Mohammed Maqsood, S.p. Venu Madhava Rao },
title = { Realization of Analog Circuits using Double Gate MOSFET at 32nm CMOS Technology },
journal = { National Conference on Emerging Trends in Advanced Communication Technologies },
issue_date = { June 2015 },
volume = { NCETACT2015 },
number = { 2 },
month = { June },
year = { 2015 },
issn = 0975-8887,
pages = { 21-26 },
numpages = 6,
url = { /proceedings/ncetact2015/number2/20988-2023/ },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Proceeding Article
%1 National Conference on Emerging Trends in Advanced Communication Technologies
%A Mohammed Maqsood
%A S.p. Venu Madhava Rao
%T Realization of Analog Circuits using Double Gate MOSFET at 32nm CMOS Technology
%J National Conference on Emerging Trends in Advanced Communication Technologies
%@ 0975-8887
%V NCETACT2015
%N 2
%P 21-26
%D 2015
%I International Journal of Computer Applications
Abstract

In this paper, design of analog circuit using double gate (DG) MOSFET where the front gate output is changed by control voltage on the back gate. The DG devices can be used to improve the performance and reduce the power dissipation when the front gate and back gate both are independently controlled. The analysis of the analog circuits such as CMOS amplifier pair, Schmitt trigger circuit and operational trans-conductance amplifier. Transient response and output DC response of analog tunable circuits are going to be analyzed. These circuit blocks are used for low-noise, high performance integrated circuits for analog and mixed-signal applications. The design and simulation results are predicted by Microwind tool in 32nm complementary metal oxide semiconductor (CMOS) technology.

References
  1. K. Suzuki, Y. Tanaka, Y. Tosaka, H. Horie, Y. Arimoto, and T. Itoh,"Analytical surface potential expression for thin-film double-gate SOI MOSFET's," Solid State Electron. , vol. 37, pp. 327–332, 1994.
  2. T. Tosaka, K. Suzuki, H. Horie, and T. Sugii, "Scaling parameter dependent model for sub-threshold swing S in double-gate SOI MOSFET's," IEEE Electron Device Lett. , vol. 15, no. 11, pp. 466–468, Nov. 1994.
  3. K. Suzuki and T. Sugii, "Analytical models for n -p double gate SOI MOSFET's," IEEE Trans. Electron Devices, vol. 42, no. 11, pp. 1940–1948, Nov. 1995.
  4. B. Yu, H. Wang, A. Joshi, Q. Xiang, E. Ibok, and M. R. Lin, "15nm gate length planar CMOS Transistor," in Tech. Dig. IEDM, pp. 937, 2001.
  5. H. -S. P. Wong, "Beyond the conventional MOSFET," in Proc. 31st Eur. Solid-State Device Research Conf. , p. 69, 2001.
  6. Pei, G. , & Kan, "Independently driven DG MOSFETs for mixed signal circuits: Part I- quasi-static and non-quasi-static channel coupling," IEEE Transactions on Electron Devices, vol. 51, pp. 2086, 2004.
  7. P. Beckett, "Low-power spatial computing using dynamic threshold devices," in Proc. IEEE Int. Symp. Circuits Syst. , pp. 2345, 2005.
  8. Sudhansu Kumar Pati. , Kalyan Koley, Arka Dutta, N Mohankumar, and Chandan Kumar Sarkar "A new approach to extracting the RF parameters of asymmetric DG MOSFETs with the NQS effect," in Journal of Semiconductors, vol 34, NO. 11, November 2013.
  9. S. Kaya, A. Kulkarni "A Novel Voltage-Controlled Ring Oscillator Based on Nanoscale DG-MOSFETs," in 20th International Conference on Microelectronics, Sharjah, U. A. E. , Dec. 2008.
  10. Ravindra Singh Kushwah, Shyam Akashe "Design and Analysis of Tunable Analog Circuit Using Double Gate MOSFET at 45nm CMOS Technology," in 2013 3rd IEEE International Advance Computing Conference (IACC).
  11. Soumyasanta Laha, Savas Kaya, Avinash Kodi and David Matolak "Double Gate MOSFET Based Efficient Wide Band Tunable Power Amplifiers," in 2013 Electrical Engineering & Computer Science, Ohio University, Athens, OH 45701, USA.
  12. Ravindra Singh Kushwah and Shyam Akashe "FinFET Based Tunable Analog Circuit: Design and Analysis at 45 nm Technology," in Hindawi Publishing Corporation Chinese Journal of Engineering Volume 2013, Article ID 165945.
  13. Dhara D. Joshi, Prof. Jai Karan Singh "Design and Implementation of 16-bit Ripple Carry Adder for Low Power in 45nm CMOS Technology," in International Journal of Emerging Technology and Advanced Engineering, Volume 4, Issue 1, January 2014.
  14. T. Cakici, A. Bansal, and K. Roy, "A low power four transistor Schmitt Trigger for asymmetric double gate fully depleted SOI devices," in Proc. IEEE SOI Conf. , pp. 21, 2003.
  15. Munish Kumar, Parminder Kaur, Sheenu Thapar "Design of CMOS Schmitt Trigger," in International Journal of Engineering and Innovative Technology (IJEIT) Volume 2, Issue 1, July 2012.
  16. Jagdeep Kaur Sahani, Shruti Suman,P. K. Ghosh "Design of Operational Trans-conductance Amplifier using Double Gate MOSFET," in Innovative Systems Design and Engineering ISSN 2222-1727 (Paper) ISSN 2222-2871 (Online) Vol. 5, No. 2, 2014.
  17. Abhay Pratap Singh, Sunil Kr. Pandey, Manish Kumar "Operational Transconductance Amplifier for Low Frequency Application," in IJCTA MAY-JUNE 2012.
  18. Mr. Bhavesh H. Soni, Ms. Rasika N. Dhavse "Design of Operational Transconductance Amplifier Using 0. 35?m Technology," in International Journal of Wisdom Based Computing, Vol. 1 (2), August 2011.
Index Terms

Computer Science
Information Sciences

Keywords

Analog Circuits Double Gate Transient And Output Dc Response