International Conference on Microelectronics, Circuits and System |
Foundation of Computer Science USA |
MICRO2016 - Number 1 |
September 2017 |
Authors: G. Prasad Acharya, N. Srinivasa Reddy, S. P.v. Subba Rao |
6b602c46-e9e8-467c-adbe-dbca7a9f4073 |
G. Prasad Acharya, N. Srinivasa Reddy, S. P.v. Subba Rao . Implementation of High Speed Convolution Algorithm on CUDA based Graphics Processing Unit. International Conference on Microelectronics, Circuits and System. MICRO2016, 1 (September 2017), 26-30.
The advancements in multi processors based computers with parallel computing has increased the computational speed . The multi processors consists of hundreds of processor cores or graphics processing units are designed for multimedia applications to improve the pixel resolution . These processors are also used for general computations are called as General Processing GPU (GP-GPU) . The exploration of multi cores in CUDA (Compute Unified Device Architecture) led to parallel computation . CUDA C is a high level programming language released by NVIDIA in 2006 for its NVIDIA GPUs. In this paper a high speed convolution algorithm is implemented on CUDA based graphics processing unit. The implemented algorithm is evaluated based on computational speed. Simulation results shows that computational speed by GPU has been increased by many folds when compared with CPU.