CFP last date
20 May 2024
International Journal of Computer Applications
A Publication of Foundation of Computer Science
Scholarly peer reviewed publication
Home
Archives
About Us
The Model
Indexing, Abstracting, and Archiving
Editorial Board
Review Board
Associate Editorial Board
Policy on Publication Ethics
Vision & Mission
Publication Ethics and Malpractice Statement
For Authors
Call for Paper - Submission Open
Topics
Journal Prints
Article Correction Policy
Publishing practices
IJCA Frequently Asked Queries
Authors Self-Archiving Policy
Citation Improvement
Home
Proceedings
International Conference on Microelectronics, Circuits and Systems
Number 2
Call for Paper
June Edition
IJCA solicits high quality original research papers for the upcoming June edition of the journal. The last date of research paper submission is 20 May 2024
Submit your paper
Know more
The week's pick
Enhancing Privacy Preservation: Multi-Attribute Protection with P-Sensitive K-Anonymity
Twinkle Patel
Kiran Amin
Random Articles
Interactive Image Segmentation using Color and Texture Features
February
2016
Image Registration using combination of PCA and GPOF Method for Multiframe Super-Resolution
June
2015
Determine Weakest Bus for IEEE 14 Bus Systems
Nov
2018
The SOM Robustness Capacity for Phonemes Recognition in Adverse Environment
December
2012
International Conference on Microelectronics, Circuits and Systems
Number 2
A Critical Analysis on Security Aspects of Software Development Lifecycle
Authors: Arghya Kusum Das, Sandip Rakshit
Improvement of Front Side Contact of Solar Cell through Light Induced Plating without any External Bias at Different Conditions
Authors: Santanu Maity, Sidhant Sahoo, Vipul Tiwari, Chandan Prashad Yadav, Chandan Tilak Bhunia
A High Speed CMOS Current Comparator in 90 nm CMOS Process Technology
Authors: Adyasha Rath, Sushanta K. Mandal, Subhrajyoti Das, Sweta Padma Dash
A Novel Design of QPSK Modulator for High Data Rate Transmission
Authors: Eleena Mohapatra
An Approach to Design Different Weighted Code Synchronous Counters by the Sequential Circuit Elements of Reversible Gates
Authors: Shefali Mamataj, Biswajit Das, Dibya Saha
Low Power High Speed 64 Bit SRAM Architecture using SCCMOS and Drowsy Cache Concept
Authors: Geeta Pattnaik, Srinibasa Padhy
Design of Optimized Wallace Tree Multiplier in Cadence
Authors: Anindita Dash, Swetapadma Dash, S.k.mandal