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Reseach Article

Review on Strategies for shared memory Sparse Matrix-Vector Multiplication

Published on December 2014 by Komal Deshmukh, M.u. Kharat
Innovations and Trends in Computer and Communication Engineering
Foundation of Computer Science USA
ITCCE - Number 1
December 2014
Authors: Komal Deshmukh, M.u. Kharat
b4bde760-7b72-4c56-a348-787b95b5aba8

Komal Deshmukh, M.u. Kharat . Review on Strategies for shared memory Sparse Matrix-Vector Multiplication. Innovations and Trends in Computer and Communication Engineering. ITCCE, 1 (December 2014), 21-23.

@article{
author = { Komal Deshmukh, M.u. Kharat },
title = { Review on Strategies for shared memory Sparse Matrix-Vector Multiplication },
journal = { Innovations and Trends in Computer and Communication Engineering },
issue_date = { December 2014 },
volume = { ITCCE },
number = { 1 },
month = { December },
year = { 2014 },
issn = 0975-8887,
pages = { 21-23 },
numpages = 3,
url = { /proceedings/itcce/number1/19042-2007/ },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Proceeding Article
%1 Innovations and Trends in Computer and Communication Engineering
%A Komal Deshmukh
%A M.u. Kharat
%T Review on Strategies for shared memory Sparse Matrix-Vector Multiplication
%J Innovations and Trends in Computer and Communication Engineering
%@ 0975-8887
%V ITCCE
%N 1
%P 21-23
%D 2014
%I International Journal of Computer Applications
Abstract

The sparse matrix is one of the most important data storage format for large amount of data. Sparse matrix-vector multiplication (SpMV) is important operation in many scientific and engineering applications. Many physical systems produce sparse matrices. Sparse matrix-vector multiplication can be implemented sequentially and it includes various methods like one dimensional cache-oblivious method, this method extended to two dimensional methods and Hilbert space filling curve. There is limitation of sequential case as it is not providing efficient result. There are some problems occur related to sequential case of multiplication that are less arithmetic intensity, cache inefficiency and limited memory bandwidth. To avoid such problem parallel techniques were introduced. It mainly focuses on high level strategies for efficient performance of sparse matrix-vector multiplication. High level strategies include no vector distribution, one dimensional distribution and two dimensional distributions. This provides high arithmetic intensity and better performance as compared to sequential technique on NUMA Architecture.

References
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Index Terms

Computer Science
Information Sciences

Keywords

Sparse Matrix-vector Multiplication (spmv) Cache-oblivious Numa Architecture