Low threshold voltage and ultra thin oxide become essential in power optimal VLSI circuit design. This paper analyzes the effect of dual thickness and dual threshold on static random access memory (SRAM) leakage power. The different hybrid cell configurations are analyzed for power optimal design of SRAM in 90nm technology node. Cell ratio of SRAM is an essential parameter for area centric SRAM design. It also decides the non destructive read operation of SRAM cell. Variation of cell ratio has also been analyzed. The effect of voltage-scaling is also analyzed for SRAM cells. It is found that voltage-scaling reduces the energy consumption but at the cost of read and write delay in SRAM cells.

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Cell Ratio Read Current Write Delay Pdp Voltage Scaling