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Reseach Article

Stability Analysis of 6T SRAM Cell at 90nm Technology

Published on February 2017 by Yogesh Kumar, Sandeep Kaur Kingra
National Conference on Latest Initiatives and Innovations in Communication and Electronics
Foundation of Computer Science USA
IICE2016 - Number 1
February 2017
Authors: Yogesh Kumar, Sandeep Kaur Kingra
7c22e142-9869-459e-baf9-b0b04ff3b24c

Yogesh Kumar, Sandeep Kaur Kingra . Stability Analysis of 6T SRAM Cell at 90nm Technology. National Conference on Latest Initiatives and Innovations in Communication and Electronics. IICE2016, 1 (February 2017), 32-36.

@article{
author = { Yogesh Kumar, Sandeep Kaur Kingra },
title = { Stability Analysis of 6T SRAM Cell at 90nm Technology },
journal = { National Conference on Latest Initiatives and Innovations in Communication and Electronics },
issue_date = { February 2017 },
volume = { IICE2016 },
number = { 1 },
month = { February },
year = { 2017 },
issn = 0975-8887,
pages = { 32-36 },
numpages = 5,
url = { /proceedings/iice2016/number1/26953-1673/ },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Proceeding Article
%1 National Conference on Latest Initiatives and Innovations in Communication and Electronics
%A Yogesh Kumar
%A Sandeep Kaur Kingra
%T Stability Analysis of 6T SRAM Cell at 90nm Technology
%J National Conference on Latest Initiatives and Innovations in Communication and Electronics
%@ 0975-8887
%V IICE2016
%N 1
%P 32-36
%D 2017
%I International Journal of Computer Applications
Abstract

SRAM is the most crucial part of memory designs and are imperative in many simple or compound applications that implicate system on chip (SoCs). Power dissipation and stability has now become the most essential area of concern in sub-micron SRAM cell design with continuous technology scaling according to Moore's law. At latest, retrenchment of channel length MOSFET is directly proportional to the new technologies generating step by step with new innovative tools. With an improvement in technology there is a sudden retrenchment of channel length of MOSFET. Moreover, in this network of stability SRAM has become very essential and major area to research in. Static noise margin generate its crucial role in the stability of SRAM. This paper introduce to the basic 6T SRAM cell. The outperforms of this SRAM cell in elaboration with transient response and static noise margin is described with the counter fit results using the EDA tool Custom Designer at 90nm CMOS Technology.

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Index Terms

Computer Science
Information Sciences

Keywords

Static Random Access Memory (sram) Cmos Static Noise Margin (snm) Read Noise Margin Write Noise Margin Wordline Bitline.