The week's pick
Reseach Article
Efficient Hardware Reduction of FIR Filter for Parallel Data in Mixed Signal Processing
| International Conference and Workshop on Emerging Trends in Technology |
| Foundation of Computer Science USA |
| ICWET2012 - Number 1 |
| March 2012 |
| Authors: Jayavrinda Vrindavanam, Resel Parameswaran |
| da597a76-f8a7-45f8-9a88-0282a90345f9 |
Jayavrinda Vrindavanam, Resel Parameswaran . Efficient Hardware Reduction of FIR Filter for Parallel Data in Mixed Signal Processing. International Conference and Workshop on Emerging Trends in Technology. ICWET2012, 1 (March 2012), 18-23.
Abstract
The paper presents a novel method of structure for designing and implementation of hardware reduced FIR filter in mixed signal processing domain for parallel data processing. Supported by a review of the literature, the paper demonstrates that the proposed methodology is superior, economical and can be applied in to applications like bio-medical and audio signals. The results show improved performance and cost reduction, which has practical implications in terms of applications.
References
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