The week's pick
Reseach Article
Spartan-II FPGA Implementation of 14 Bit, 20msamples/S, 85 Mw Successive Approximation ADC Suitable For RF Applications
| International Conference and Workshop on Emerging Trends in Technology |
| Foundation of Computer Science USA |
| ICWET - Number 6 |
| None 2011 |
| Authors: Rajendra D. Kanphade, Santosh B. Patil, Arum. M. Patokar, Devesh D. Nawgaje |
| 3d749af1-b788-4f0d-b8d9-cb569a33f959 |
Rajendra D. Kanphade, Santosh B. Patil, Arum. M. Patokar, Devesh D. Nawgaje . Spartan-II FPGA Implementation of 14 Bit, 20msamples/S, 85 Mw Successive Approximation ADC Suitable For RF Applications. International Conference and Workshop on Emerging Trends in Technology. ICWET, 6 (None 2011), 7-11.
Abstract
The complexity of the circuits design is growing rapidly with the increasing demand of electronics products in the market. The time available to design a product is shrinking because of competitive pressures. Considerable amount of money get spend in developing an electronics design. FPGA environment is the best solution to address all such issues. In this work FPGA, Matlab, and ISE 9.1i such low cost tools are used to design 14 bit, 20 MSamples/s, 85 mW successive approximation analog-to-digital converter (ADC) suitable for RF applications. Matlab’s Simulink is used to generate VeriLog code for ADC. The design is simulated and synthesized using Xilinx’s ISE 9.1i and finally results are tested on Xilinx’s Spartan II FPGA.
References
- Krishnachandran K Nair, (2005) “Low Power Analogue to Digital Converter for Power Management IC’s”, A .Sc. Project Report submittedto Institute of system level integration ISLI.
- Sam Blackman, (1999) “A Low Power, 8-bit, 200 MHz Digital-to-Analog Converter” A research report submitted to Electronics Research Laboratory College of Engineering University of California, Berkeley.
- M.G. Bellanger, G. Bonnerot, and P. Caniquit, ( 1978)“Specification of A/D and D/A converters for FDM telephone signals”,IEEE Trans. Circuits Syst. Vol CAS 25, no. 7,pp. 461-467.
- Syed Hassan Raza Naqvi, (2007) “1 GS/s, Low Power Flash Analog to Digital Converter in 90nm CMOS Technology”, A Master thesis in Electronic Devices at Linköping Institute of Technology.
- Clemens Maria Hammerschmied , “CMOS A/Dconverters Using MOSFET- only R-2R Ladders”, A dissertation submitted to Swiss Federal Institute of Technology Zurich for the degree of Doctor of Technical Sciences.
- H. Inose, Y. Yasuda and J. Marakami, (1962) “A Telemetering System By Code Modulation, Delta Sigma Modulation”, IRE Trans. on Space, Electronics and Telemetry, SET-8, pp. 204-209.
- Data sheet AD7940 from Analog Devices.
- Data sheet LTC1411 from Linear Technology.
- DADI Mohamed béchir, BOUALLEGUE Ridha, and EZZEDDINE taher, (2007) “New Approach to optimize a Sigma Delta Modulator”, IJCSNS International Journal of Computer Science and Network Security, VOL.7 No.6.
- Cao Xiaoqiu,Zeng Jin and Yang Tao, (2007) “Implementation of High-speed High-resolution Data Conversion System Using FPGA”, The Eighth International Conference on Electronic Measurement and Instruments ICEMI.,pp 4-862-4- 864.
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