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IEEE 754 Floating Point Standard, FPGA�S and HDL�S in VLSI Design
| International Conference on VLSI, Communication & Instrumentation |
| Foundation of Computer Science USA |
| ICVCI - Number 6 |
| None 2011 |
| Authors: Eldhose K A, K .R. Lekshmi, K. S.Lalmohan |
| 2e71a3ad-47e2-43bd-9051-ba156db32ac8 |
Eldhose K A, K .R. Lekshmi, K. S.Lalmohan . IEEE 754 Floating Point Standard, FPGA�S and HDL�S in VLSI Design. International Conference on VLSI, Communication & Instrumentation. ICVCI, 6 (None 2011), 6-11.
Abstract
In this paper, a brief description about the IEEE 754 Floating point standards, FPGA’s, Hardware Description Languages used in VLSI design is given. In the third chapter a comparison between ASIC and FPGA is given along with the description of FPGA’S. At the end, a design methodology followed in VLSI design involving the above topics are mentioned.
References
- IEEE Standard for Binary Floating-Point Arithmetic (ANSI/IEEE Std 754-1985), and it is also known as IEC 60559:1989, Binary floating-point arithmetic for microprocessor systems (originally the reference number was IEC 559:1989).
- www.xilinx.com/support/documentation/user_guides / ug012.pdf.com
- Jayaram Bhasker, ”VHDL Primer,”3rd edition, dorling Kindersley, India.
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