International Conference on VLSI, Communication & Instrumentation |
Foundation of Computer Science USA |
ICVCI - Number 4 |
None 2011 |
Authors: B Rajendra Naik, Rameshwar Rao, Shefali |
7f53ab3d-5196-4976-8cda-5e58097e9ea8 |
B Rajendra Naik, Rameshwar Rao, Shefali . Low-Area Low-Power And High-Speed TCAMS. International Conference on VLSI, Communication & Instrumentation. ICVCI, 4 (None 2011), 5-10.
Ternary Content Addressable Memory (TCAM) is hardware-based parallel lookup tables with bit-level masking capability. They are attractive for applications such as packet forwarding and classification in network routers. TCAMS are gaining importance in high-speed intensive applications. However, the high cost and power consumption are limiting their popularity and versatility. This paper presents the power reduction techniques for low-energy and high-performance TCAMS to reduce the power considerably without affecting the speed of operation. The considerable power reduction has been achieved through a layout drawn for various techniques in the 0.18μm CMOS technology. These techniques have been implemented in the Microwind 3.0 version tool. The simulation results show a significant power reduction in 0.18μm CMOS technology.