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Reseach Article

Hardware and Software Codesign for Computer Screen Image Processing Applications using FPGA

Published on February 2013 by P. Sivarama Prasad, K. Srinivasa Rao
International Conference on Recent Trends in Information Technology and Computer Science 2012
Foundation of Computer Science USA
ICRTITCS2012 - Number 6
February 2013
Authors: P. Sivarama Prasad, K. Srinivasa Rao
9131c7c1-eacc-4025-a74e-fcb0ed292872

P. Sivarama Prasad, K. Srinivasa Rao . Hardware and Software Codesign for Computer Screen Image Processing Applications using FPGA. International Conference on Recent Trends in Information Technology and Computer Science 2012. ICRTITCS2012, 6 (February 2013), 6-11.

@article{
author = { P. Sivarama Prasad, K. Srinivasa Rao },
title = { Hardware and Software Codesign for Computer Screen Image Processing Applications using FPGA },
journal = { International Conference on Recent Trends in Information Technology and Computer Science 2012 },
issue_date = { February 2013 },
volume = { ICRTITCS2012 },
number = { 6 },
month = { February },
year = { 2013 },
issn = 0975-8887,
pages = { 6-11 },
numpages = 6,
url = { /proceedings/icrtitcs2012/number6/10284-1387/ },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Proceeding Article
%1 International Conference on Recent Trends in Information Technology and Computer Science 2012
%A P. Sivarama Prasad
%A K. Srinivasa Rao
%T Hardware and Software Codesign for Computer Screen Image Processing Applications using FPGA
%J International Conference on Recent Trends in Information Technology and Computer Science 2012
%@ 0975-8887
%V ICRTITCS2012
%N 6
%P 6-11
%D 2013
%I International Journal of Computer Applications
Abstract

The computer screen processing based machine learning algorithms is envisaged for future knowledge management applications. The front end based information retrieval is quite similar to human method of information access from computer. The proposed architecture is highly computational intensive and mostly performs image processing algorithms for extracting the information from the screen image. An FPGA based hardware accelerator is proposed for this application. The Xilinx Spartan-6 FPGA board is used for realizing morphological image processing modules along with Microblaze soft core. The Microblaze software performs the control operation and provides 100 Mbps Ethernet access to PC. The image processing modules are verified working at 100 MHz clock with chipscope occupying 70% of the selected Spartan-6 LX45 device along with Microblaze soft core.

References
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Index Terms

Computer Science
Information Sciences

Keywords

Knowledge Management Machine Learning Computer Screen Processing Morphological Image Processing