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Analysis and Predictability of Page Replacement Techniques towards Optimized Performance

Published on March 2012 by Debabrata Swain, Bancha Nidhi Dash, Debendra O Shamkuwar, Debabala Swain
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International Conference on Recent Trends in Information Technology and Computer Science
Foundation of Computer Science USA
ICRTITCS - Number 3
March 2012
Authors: Debabrata Swain, Bancha Nidhi Dash, Debendra O Shamkuwar, Debabala Swain
7581d7dc-b59a-4770-83e7-f21dfe67d48d

Debabrata Swain, Bancha Nidhi Dash, Debendra O Shamkuwar, Debabala Swain . Analysis and Predictability of Page Replacement Techniques towards Optimized Performance. International Conference on Recent Trends in Information Technology and Computer Science. ICRTITCS, 3 (March 2012), 12-16.

@article{
author = { Debabrata Swain, Bancha Nidhi Dash, Debendra O Shamkuwar, Debabala Swain },
title = { Analysis and Predictability of Page Replacement Techniques towards Optimized Performance },
journal = { International Conference on Recent Trends in Information Technology and Computer Science },
issue_date = { March 2012 },
volume = { ICRTITCS },
number = { 3 },
month = { March },
year = { 2012 },
issn = 0975-8887,
pages = { 12-16 },
numpages = 5,
url = { /proceedings/icrtitcs/number3/5187-1019/ },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Proceeding Article
%1 International Conference on Recent Trends in Information Technology and Computer Science
%A Debabrata Swain
%A Bancha Nidhi Dash
%A Debendra O Shamkuwar
%A Debabala Swain
%T Analysis and Predictability of Page Replacement Techniques towards Optimized Performance
%J International Conference on Recent Trends in Information Technology and Computer Science
%@ 0975-8887
%V ICRTITCS
%N 3
%P 12-16
%D 2012
%I International Journal of Computer Applications
Abstract

Caching is a fundamental technique commonly employed to hide the latency gap between memory and the CPU by exploiting locality in memory accesses. On today’s architectures a cache miss may cost several hundred CPU cycles [1]. In a two-level memory hierarchy, a cache performs faster than auxiliary storage, but is more expensive. Cost concerns thus usually limit cache size to a fraction of the auxiliary memory’s size. This paper represents a comparative predictability about some of the traditional and new replacement techniques in contrast with OPTIMAL replacement technique.

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Index Terms

Computer Science
Information Sciences

Keywords

Memory Management Cache Performance Replacement Policy Hit Ratio Analysis