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Design and Verification of Carry Select Adder in 180nm CMOS Technology

Published on October 2015 by Amol D. Rewatkar, R. N. Mandavgane, S. R. Vaidya
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International Conference on Advancements in Engineering and Technology (ICAET 2015)
Foundation of Computer Science USA
ICQUEST2015 - Number 2
October 2015
Authors: Amol D. Rewatkar, R. N. Mandavgane, S. R. Vaidya
c96a827b-6ab9-49d6-b413-08b4ed3c9dd9

Amol D. Rewatkar, R. N. Mandavgane, S. R. Vaidya . Design and Verification of Carry Select Adder in 180nm CMOS Technology. International Conference on Advancements in Engineering and Technology (ICAET 2015). ICQUEST2015, 2 (October 2015), 5-7.

@article{
author = { Amol D. Rewatkar, R. N. Mandavgane, S. R. Vaidya },
title = { Design and Verification of Carry Select Adder in 180nm CMOS Technology },
journal = { International Conference on Advancements in Engineering and Technology (ICAET 2015) },
issue_date = { October 2015 },
volume = { ICQUEST2015 },
number = { 2 },
month = { October },
year = { 2015 },
issn = 0975-8887,
pages = { 5-7 },
numpages = 3,
url = { /proceedings/icquest2015/number2/22984-2742/ },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Proceeding Article
%1 International Conference on Advancements in Engineering and Technology (ICAET 2015)
%A Amol D. Rewatkar
%A R. N. Mandavgane
%A S. R. Vaidya
%T Design and Verification of Carry Select Adder in 180nm CMOS Technology
%J International Conference on Advancements in Engineering and Technology (ICAET 2015)
%@ 0975-8887
%V ICQUEST2015
%N 2
%P 5-7
%D 2015
%I International Journal of Computer Applications
Abstract

Adders are the basic unit of arithmetic operations. Due to the rapidly growing mobile industry not only the faster arithmetic unit but also reduced area and low power arithmetic units are needed. The CMOS carry select adder (CSLA) consists of two sets of ripple carry adder (RCA) and the modified CSLA replaces one set of RCA with a binary to Excess One (BEC) converter. The modified carry select adder architecture has developed using Binary to Excess-1 converter (BEC). In this paper design of 16 bit modified carry select adder has been designed.

References
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Index Terms

Computer Science
Information Sciences

Keywords

Area Efficient Csla Low Power And Bec