Robust, high-performance and low-power match-line sense amplifier designs are urgently required to catch up with the new requirements of large-scale CAMs in nano-scale CMOS technologies. In this paper we evaluate the performance of four state-of-the-art match-line sense amplifier designs in terms of power, delay and robustness against temperature, supply voltage and process variations. Our results show that the pre-charge low match-line sensing schemes suffers from process variations. Despite featuring low power consumption, these designs can hardly be scaled down to operate in low-voltage sub-65 nm CMOS process. On the other hand, the conventional and the charge-injection designs are much more robust and hence more suitable for low-voltage sub-65 nm CMOS implementations.

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Low-power Cmos Memory Content Addressable Memory (cam)