CORDIC algorithm has been utilized for various applications such as DSP, Biometrics, Image processing, Robotics apart from general scientific and technical computation. Rotation of vectors through fixed angles has a wide range of application. But in reference to previous CORDIC models, we don't find any optimized scheme for rotation of vectors through fixed angles. This results in increase in On-chip area and power consumption. Taking all these important factors into consideration, here in this paper, we have proposed a simplified pipelined CORDIC architecture model by writing appropriate programs in VHDL for calculating sine and cosine values of an angle with fixed number of iterations. As a result of this, this proposed CORDIC algorithm model helps in achieving reduced On-chip area and power consumption compared to previous reference conventional CORDIC architecture models. System simulation is carried out using ModelSim 6. 3f and Xilinx ISE design Suite 9. 2i

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Cordic Sine Cosine Barrel Shifter Vhdl