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Reseach Article

Testable Sequential Circuits using Conservative Toffoli

Published on November 2014 by K.rekha Swathi Sri, M.mano, M.mohanaarasi
International Conference on Innovations in Information, Embedded and Communication Systems
Foundation of Computer Science USA
ICIIECS - Number 1
November 2014
Authors: K.rekha Swathi Sri, M.mano, M.mohanaarasi
35005890-bc06-4098-a428-8b1c037eaf81

K.rekha Swathi Sri, M.mano, M.mohanaarasi . Testable Sequential Circuits using Conservative Toffoli. International Conference on Innovations in Information, Embedded and Communication Systems. ICIIECS, 1 (November 2014), 34-38.

@article{
author = { K.rekha Swathi Sri, M.mano, M.mohanaarasi },
title = { Testable Sequential Circuits using Conservative Toffoli },
journal = { International Conference on Innovations in Information, Embedded and Communication Systems },
issue_date = { November 2014 },
volume = { ICIIECS },
number = { 1 },
month = { November },
year = { 2014 },
issn = 0975-8887,
pages = { 34-38 },
numpages = 5,
url = { /proceedings/iciiecs/number1/18652-1443/ },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Proceeding Article
%1 International Conference on Innovations in Information, Embedded and Communication Systems
%A K.rekha Swathi Sri
%A M.mano
%A M.mohanaarasi
%T Testable Sequential Circuits using Conservative Toffoli
%J International Conference on Innovations in Information, Embedded and Communication Systems
%@ 0975-8887
%V ICIIECS
%N 1
%P 34-38
%D 2014
%I International Journal of Computer Applications
Abstract

Testing of Sequential circuits can be done by two test vectors (all 1's and all 0's) if the circuits were based on the conservative logic. The circuit is made to be tested by designing the circuit with the help of Reversible logic gates. Toffoli gate is used as reversible gate in this paper. Sequential circuits such as latches, flip flops are designed with the help of conservative logic reversible gate. Therefore, testing does not require any scan path access to the internal memory cell since only normal mode and test mode are required for testing. Equivalent circuit of the Toffoli gate is presented which achieves the fault coverage. The objective of this paper is to reduce the number of test vectors. Fault coverage is also achieved rather than designing the circuit with fredkin gate. Power consumption may also reduce when compared with the fredkin gate.

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Index Terms

Computer Science
Information Sciences

Keywords

Conservative Logic Reversible Gate Fredkin Gate Toffoli Gate.