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Reseach Article

Dynamic Distribution Of Memory for Switch Architecture

Published on June 2013 by Vishnu Priya.a, Senthil Kumar P
International Conference on Innovation in Communication, Information and Computing 2013
Foundation of Computer Science USA
ICICIC2013 - Number 3
June 2013
Authors: Vishnu Priya.a, Senthil Kumar P
aeb4b14d-e3d7-49d3-a009-eff0839541b6

Vishnu Priya.a, Senthil Kumar P . Dynamic Distribution Of Memory for Switch Architecture. International Conference on Innovation in Communication, Information and Computing 2013. ICICIC2013, 3 (June 2013), 23-31.

@article{
author = { Vishnu Priya.a, Senthil Kumar P },
title = { Dynamic Distribution Of Memory for Switch Architecture },
journal = { International Conference on Innovation in Communication, Information and Computing 2013 },
issue_date = { June 2013 },
volume = { ICICIC2013 },
number = { 3 },
month = { June },
year = { 2013 },
issn = 0975-8887,
pages = { 23-31 },
numpages = 9,
url = { /proceedings/icicic2013/number3/12276-0157/ },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Proceeding Article
%1 International Conference on Innovation in Communication, Information and Computing 2013
%A Vishnu Priya.a
%A Senthil Kumar P
%T Dynamic Distribution Of Memory for Switch Architecture
%J International Conference on Innovation in Communication, Information and Computing 2013
%@ 0975-8887
%V ICICIC2013
%N 3
%P 23-31
%D 2013
%I International Journal of Computer Applications
Abstract

Interconnection networks are a key component of a variety of systems. In real time, low-latency and contention-free interconnection networks are demanded for the execution of many applications in systems . In modern interconnection networks it is mandatory the use of an effective congestion management technique in order to keep network performance at maximum level under any situations. Although congestion may be avoided by scaling the network size, but the current trends are to reduce overall equipment cost and power consumption of a network ,by plummeting the number of network components. Thus, the network will be prone to congestion, thereby becoming congestion free is mandatory for an efficient & effective network . Therefore, in this dissertation we describe the new congestion management technique (RECN-IQDD) suitable for any type of IQ (Input queue switch architecture: only queues at input port of a switch) switches with enhanced RECN(Regional Explicit Congestion Notification : an efficient Head-of-Line block elimination technique ,with a cost effective Switching architecture to face the challenges of congestion management, has been recently proposed for Advanced Switching (AS) . The idea behind RECN-IQDD is, starting with a simple input queued switch with a single queue per input port, to add some extra queues dynamically allocated for storing congested packets ,to avoid HOL blocking and Distributed deallocates of set aside when congestion vanishes . so, HOL blocking is completely eliminated with less number of queues . Regarding the performance it leads to a significant reduction of the data memory area required at each port in the reduction factor of 5 times than RECN-CIOQ (Combined Input Output Queue - have queues at both Input port & Output port of a switch) and avoids the use of explicit congestion notifications and token-exchanging packets .

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Index Terms

Computer Science
Information Sciences

Keywords

Advanced Switching Congestion buffering Switching Flow Control