The paper proposes a novel algorithm for a Network-on- Chip, which is based on packet switching. Unlike datagram protocol used in large communication network, which can be one of the algorithms in NoC; this paper concentrates on static method of routing of packets. The algorithm described here, uses three different types of packets to achieve communication between various intellectual properties connected to the chip. A packet named route establisher commences the start of packet transfer establishing a fixed route from the source node to the destination node. The packet following route establisher is the data packet, which hops through the same nodes as fixed by the route establisher. When all the data is sent or received, source IP has an option of destroying the link with the destination IP, using route destroyer packet, or might keep it for future communication. A simple prototype using sixteen nodes is used in the design to prove the working of NoC, which further can be expanded to any number of nodes as per the requirement in the design. The proposed algorithm is applicable for a network which is a square mesh topology. The number of nodes in a row should be exactly equal to the number of nodes in a column. The paper also enhances a unique internal architecture of a node in NoC, focusing on the uses of Content Addressable Memory (CAM) as a routing table in a node.

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Network-on-chip Static Routing Parallelism Content Addressable Memory (cam) Routing Table