International Conference on Advances in Emerging Technology |
Foundation of Computer Science USA |
ICAET2017 - Number 1 |
July 2018 |
Authors: Rohit Raj, Monika Aggarwal, Gaurav Mittal |
4839577e-c182-48df-a555-fa5ee278ae64 |
Rohit Raj, Monika Aggarwal, Gaurav Mittal . Review on HDL Implementation of Digital Image Display on VGA. International Conference on Advances in Emerging Technology. ICAET2017, 1 (July 2018), 13-16.
Image processing is always a very instance application while working on embedded platforms. It is still a very challenging task. To accelerate this image processing applications, Field-programmable gate arrays (FPGAs) offer a suitable platform as a customized hardware to accelerate this. The recent image processing algorithms are concentrated on pixel-based modules for simple preprocessing tasks. And these tasks are mainly defined using MATLAB. This paper deals with the implementation of image/digital captured data into real time hardware using HDLs with the motto of relatively inexpensive and adaptable technology. Thus, it offers modules and interfaces to perform operations and incorporate software defined operations. This paper shows the digital image (from any source/formats) can be stored into a memory (RAM/ROM) onto the FPGA and then it can be further processed for larger display devices i. e. on VGA monitors.