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Comparative Analysis of Different Types of Full Adders using 180nm and 90nm Technology

Published on September 2016 by P. A. Irfan Khan, Ravi Shankar Mishra, Sandeep Dhariwal
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International Conference on Advances in Emerging Technology
Foundation of Computer Science USA
ICAET2016 - Number 11
September 2016
Authors: P. A. Irfan Khan, Ravi Shankar Mishra, Sandeep Dhariwal
ea31e7a9-76a5-4def-a23f-dcb510781327

P. A. Irfan Khan, Ravi Shankar Mishra, Sandeep Dhariwal . Comparative Analysis of Different Types of Full Adders using 180nm and 90nm Technology. International Conference on Advances in Emerging Technology. ICAET2016, 11 (September 2016), 13-16.

@article{
author = { P. A. Irfan Khan, Ravi Shankar Mishra, Sandeep Dhariwal },
title = { Comparative Analysis of Different Types of Full Adders using 180nm and 90nm Technology },
journal = { International Conference on Advances in Emerging Technology },
issue_date = { September 2016 },
volume = { ICAET2016 },
number = { 11 },
month = { September },
year = { 2016 },
issn = 0975-8887,
pages = { 13-16 },
numpages = 4,
url = { /proceedings/icaet2016/number11/25947-t177/ },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Proceeding Article
%1 International Conference on Advances in Emerging Technology
%A P. A. Irfan Khan
%A Ravi Shankar Mishra
%A Sandeep Dhariwal
%T Comparative Analysis of Different Types of Full Adders using 180nm and 90nm Technology
%J International Conference on Advances in Emerging Technology
%@ 0975-8887
%V ICAET2016
%N 11
%P 13-16
%D 2016
%I International Journal of Computer Applications
Abstract

The full adder circuit is the major cell in many processing Systems. The full adder is used to add the partial products of multipliers. Decreasing the number of transistor count in full adder can result in the less power consumption. In this paper different types of full adders has been implemented by using cadence virtuoso 180nm and 90nm technology this results decreasing the total power consumption of full adder.

References
  1. Sansar, Chand, Sankhyan, Comparative study of Different types of Full adder circuits, International journal of Engineering Research and Applications, Vol. 3, pp. 1062-1064 (2013).
  2. C. Channegowda, Dr. A. R. Aswatha, Low-power 1-Bit Full-Adder cell using Modified Pass Transistor Logic, International Journal of Computer science and Information Technologies, Vol. 4, pp. 489-491 (2013).
  3. M. B. Damle, Dr. S. S. Limaye, M. G. Sonwani, Comparative Analysis of Different Types of Full adder circuits, IOSR Journal of Computer Engineering, Vol. 11, pp. 01-09 (2013).
  4. S. Yadav, Kavita Chauhan, Study and Analysis of Various Types of Full Adder's Scheme for 250nm CMOS Technology, International Journal of Electrical, Electronics and Computer Engineering, Vol. 2, pp. 61-65 (2013).
  5. A. M. Shams, M. A. Bayoumi, A Novel High- Performance CMOS 1-Bit Full-Adder Cell, IEEE Transaction on Circuits and Systems, Vol. 47, pp. 478-481 (2000).
  6. G. Sathiyabama, R. Shailaja, A Survey of Low Power High Speed Full Adder, International Journal of Emerging Technology and Advanced Engineering, Vol. 2, pp. 527-532 (2012)
Index Terms

Computer Science
Information Sciences

Keywords

Full Adder Adiabatic Logic 28t 20t 14t Half Adder