With the advancement in automation, the importance of periodic testing of electronic circuits during their lifetime is increasing day by day. Generally, a circuit or system consumes more power in test mode than in normal mode. This extra power consumption can give rise to severe hazards in circuit reliability or, in some cases, can provoke instant circuit damage. Thus it is necessary to reduce the power consumption during test mode. This power is proportional to the number of node switching due to the feeding of successive test patterns. Test patterns generated by ATALANTA with –D option, contains don't cares. Efficient filling of don't cares in the patterns may reduce the number of switching when they are applied in succession. In this paper we have presented an approach based on Genetic Algorithm (GA) for don't care filling of the test patterns generated by Atalanta to reduce switching during circuit testing without compromising fault coverage. The proposed GA based formulation can save upto 58% power compared to existing approach. A trade-off between fault coverage and transitions also has been presented in this paper.

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Testing Low Power Genetic Algorithm Don't Care Fault Coverage Switching