CMOS refers to both a particular style of digital circuitry design, and the family of processes used to implement that circuitry on integrated circuits (chips). CMOS circuitry in VLSI dissipates less power and is denser than other implementations having the same functionality. As this advantages has grown and become more important,CMOS processes and variants for VLSI have come to dominate, so that vast majority of modern integrated circuit manufacturing in on VLSI technology processes. . In today's wireless communication systems, requires objectives like maximum frequency with low power consumption, small size and low fabrication cost. A key circuit use in modern communication is Dual Modulus Prescaler. The layout of DMP which is develop by us is a modified design of high performance DMP. This is optimum design for use in industries at 90nm VLSI technology. This report is a brief study of high performance DMP on 90nm VLSI technology to achieve objectives as mentioned above. A divide-by 256/257 dual-modulus prescaler have been fabricated in a 90-nm CMOS process. The synchronous divide-by-4/5 divider uses source coupled logic (SCL) D flip-flops with a resistive load to achieve the 17. 2-GHz maximum operating frequency. The prescaler requires 4. 3 mA current from a 1. 5-V supply. This circuit has the highest operating frequency and the lowest power consumption reported to date among CMOS dual-modulus prescalers that can operate at 10 GHz or higher. The prescaler also works up to 15. 8 GHz with a 1. 2-Vsupply and draws 3-mA current.

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Vlsi Technology 90nm Microwind3. 1 Cmos Dual-modulus Prescaler Source Coupled Logic Merged Nand Function Scaling High Performance