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A Review on Architecture of High Speed data Communication for USB 2.0 device using FPGA

Published on May 2015 by Zessha Mishra, Anil Kumar Sahu
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National Conference Potential Research Avenues and Future Opportunities in Electrical and Instrumentation Engineering
Foundation of Computer Science USA
ACEWRM2015 - Number 3
May 2015
Authors: Zessha Mishra, Anil Kumar Sahu
5adabc0e-0c48-4d4e-a23c-8c99b37413f2

Zessha Mishra, Anil Kumar Sahu . A Review on Architecture of High Speed data Communication for USB 2.0 device using FPGA. National Conference Potential Research Avenues and Future Opportunities in Electrical and Instrumentation Engineering. ACEWRM2015, 3 (May 2015), 15-18.

@article{
author = { Zessha Mishra, Anil Kumar Sahu },
title = { A Review on Architecture of High Speed data Communication for USB 2.0 device using FPGA },
journal = { National Conference Potential Research Avenues and Future Opportunities in Electrical and Instrumentation Engineering },
issue_date = { May 2015 },
volume = { ACEWRM2015 },
number = { 3 },
month = { May },
year = { 2015 },
issn = 0975-8887,
pages = { 15-18 },
numpages = 4,
url = { /proceedings/acewrm2015/number3/20912-6044/ },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Proceeding Article
%1 National Conference Potential Research Avenues and Future Opportunities in Electrical and Instrumentation Engineering
%A Zessha Mishra
%A Anil Kumar Sahu
%T A Review on Architecture of High Speed data Communication for USB 2.0 device using FPGA
%J National Conference Potential Research Avenues and Future Opportunities in Electrical and Instrumentation Engineering
%@ 0975-8887
%V ACEWRM2015
%N 3
%P 15-18
%D 2015
%I International Journal of Computer Applications
Abstract

In this paper a review on USB2. 0 using this innovative approach presented the authors own concept of USB receiver/transmitter architecture. The various concept was implemented in hardware description language to provide model for simulations. Simultaneously the code is synthesizable, and may be physically implemented in programmable logic devices. Selected details of construction and functionality of USB protocol were reported. Described The Universal Serial Bus (USB) Transceiver Macro cell Interface (UTMI) is a two wire, bi- directional serial bus interface between USB devices through D+ and D- lines. There are three functional blocks present in USB controller; those are Serial Interface Engine (SIE), UTMI and Device Specific Logic (DSL). When the data is received on the serial bus, it is decoded, bit unstuffed and is sent to receive shift register. Designed a High speed easy to use peripheral interfaces like USB 2. 0 . Implemented hardware on a Spartan-3 FPGA is easily capable of handling data throughputs as high as what USB 2. 0 demands. Using dedicated resources such as multipliers it is also possible to do signal processing tasks on these data.

References
  1. Babulu, K. , & Rajan, K. S. (2008, July). FPGA Implementation of USB Transceiver Macrocell Interface with USB2. 0 Specifications. In Emerging Trends in Engineering and Technology, 2008. ICETET'08. First International Conference on (pp. 966-970). IEEE.
  2. Jolfaei, F. A. , Mohammadizadeh, N. , Sadri, M. S. , & FaniSani, F. (2009, December). High speed USB 2. 0 interface for FPGA based embedded systems. In Embedded and Multimedia Computing, 2009. EM-Com 2009. 4th International Conference on (pp. 1-6). IEEE.
  3. Guo, G. , Li, Z. , & Yang, F. (2011, July). Design of high speed pulse data acquisition system based on FPGA and USB. In Multimedia Technology (ICMT), 2011 International Conference on (pp. 5374-5376). IEEE.
  4. Lun, C. C. , bin Marzuki, A. , & Wei, S. H. (2012, June). Analog front-end design implementation of USB2. 0 OTG Attach Detection Protocol. In Intelligent and Advanced Systems (ICIAS), 2012 4th International Conference on (Vol. 2, pp. 774-779). IEEE.
  5. Szecówka, P. M. , & Pyrzynski, K. J. (2012, September). USB receiver/transmitter for FPGA implementation. In Signals and Electronic Systems (ICSES), 2012 International Conference on (pp. 1-6). IEEE.
  6. Pandey, M. K. , Shekhar, S. , Singh, J. , Agarwal, G. K. , & Saxena, N. (2013, July). A novel approach for USB2. 0 validation on System on Chip. In 2013 Fourth International Conference on Computing, Communications and Networking Technologies (ICCCNT) (pp. 1-4). IEEE.
  7. http://www. scribd. com/doc/97042848/USB-2-0 TransceiverMacrocellInterfface-UTMI-SpecXcvr-Macrocell-1-05#scribd
  8. http://resourcecentre. daiict. ac. in/resources/btp/full_catalogue_2006_10. pdf
Index Terms

Computer Science
Information Sciences

Keywords

Usb. 2. 0 Utmi Transmitter Receiver.