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An Efficient Full Adder Design using Different Logic Styles

by Nishan Singh, Mandeep Kaur, Amardeep Singh, Puneet Jain
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International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 98 - Number 21
Year of Publication: 2014
Authors: Nishan Singh, Mandeep Kaur, Amardeep Singh, Puneet Jain
10.5120/17310-7786

Nishan Singh, Mandeep Kaur, Amardeep Singh, Puneet Jain . An Efficient Full Adder Design using Different Logic Styles. International Journal of Computer Applications. 98, 21 ( July 2014), 38-41. DOI=10.5120/17310-7786

@article{ 10.5120/17310-7786,
author = { Nishan Singh, Mandeep Kaur, Amardeep Singh, Puneet Jain },
title = { An Efficient Full Adder Design using Different Logic Styles },
journal = { International Journal of Computer Applications },
issue_date = { July 2014 },
volume = { 98 },
number = { 21 },
month = { July },
year = { 2014 },
issn = { 0975-8887 },
pages = { 38-41 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume98/number21/17310-7786/ },
doi = { 10.5120/17310-7786 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T22:26:49.507884+05:30
%A Nishan Singh
%A Mandeep Kaur
%A Amardeep Singh
%A Puneet Jain
%T An Efficient Full Adder Design using Different Logic Styles
%J International Journal of Computer Applications
%@ 0975-8887
%V 98
%N 21
%P 38-41
%D 2014
%I Foundation of Computer Science (FCS), NY, USA
Abstract

The paper discusses a comparative study of full adders with various logic style of designing. Logic style affects the switching capacitance, transition activity, short circuit current and delay. Various logic styles have been compared taking full adder as a reference circuit and power dissipation and delay as reference parameters. Simulation results of all the full adders at technologies of 180nm, 90nm, 45nm of CMOS process have been provided. It is observed that less power is consumed in the Transmission based full adder than the Convention full adder and Pass Transistor full adder.

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Index Terms

Computer Science
Information Sciences

Keywords

CPL Complementary CMOS DPL Transmission Gate (TG) Pass Transistor Logic Adder Circuits Low Power Logic Styles.

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