The week's pick
Random Articles
Reseach Article
Comparative Analysis of Design Methodologies for Parallel FIR Filter
| International Journal of Computer Applications |
| Foundation of Computer Science (FCS), NY, USA |
| Volume 98 - Number 2 |
| Year of Publication: 2014 |
| Authors: Nongmaithem Lalleima Chanu, Bidyalaxmi Devi Tensubam, Vimal Kant Pandey |
10.5120/17158-7212
|
Nongmaithem Lalleima Chanu, Bidyalaxmi Devi Tensubam, Vimal Kant Pandey . Comparative Analysis of Design Methodologies for Parallel FIR Filter. International Journal of Computer Applications. 98, 2 ( July 2014), 40-43. DOI=10.5120/17158-7212
Abstract
The importance of DSP systems with low power, low area and high performance appear to be increasing with no visible sign of saturation. Digital filters play a vital role in digital systems where Finite Impulse Response (FIR) filters are one of the most widely used fundamental devices. This review paper deal with the design and implementation of parallel FIR filter structure on FPGA using 4 different parallel processing methodologies with minimal cost of hardware. Since adders have no effect to the filter length and occupy less area than the multipliers, here multipliers are exchanged with adders. The paper hence describes the comparative performance analysis of traditional parallel FIR filter with respect to the FFA, transposition and symmetric convolution based parallel FIR filter with featuring the advantage of reduced hardware complexity to accurate processing with conservation of filter dynamic.
References
- Acha JI. 1989. Computational Structures for Fast Implementation of L-path and L-block digital filters. IEEE Trans. Circuit and Systems I. Vol. 36, No. 6, pp:805-812.
- Chang TS and Jen CW. 2001. Hardware Efficient Pipelined Programmable FIR Filter Design. Computers and Digital Techniques, in IEEE proceeding. Vol. 148, No. 6, pp:227-232.
- Chao Cheng, Keshab K Parhi. 2004. Hardware Efficient fast Parallel FIR Filter Structure Based on Iterated Short Convolution. IEEE Trans. Circuit and System I. Vol. 51, No. 8, pp:1492-1500.
- Chao Cheng and Keshab K Parhi. 2005. Further Complexity Reduction of Parallel FIR Filters. in Proc. IEEE International Symposium on Circuit and Systems I. Vol. 2, pp:1835-1838.
- Chao Cheng and Keshab K Parhi. 2007. Low Cost Parallel FIR Filter Structures with 2-stage Parallelism. IEEE Trans. on Circuit System I. Vol. 54, No. 2, pp:280-290.
- Jin-Gyum Chung, Keshab K Parhi (2002). Frequency Spectrum Based Low-area low-power Parallel FIR Filter design. EURASIP Journal on Applied Signal Processing. 9:944-953.
- Keshab K Parhi. 2012. VLSI Digital Signal Processing Systems Design and Imlpementation. In. Willey Student (ed. ) Chapter 3 and chapter 9.
- Lin I. S. and Mitra S. K. 1996. Overlapped Block Digital Filtering. IEEE Trans. on Circuit Systems II Analog Digital Signal Processing. Vol. 43, No. 8, pp:586-596.
- Parkar D. A. and Parhi K. K. 1997. Low Area/Power Parallel FIR Digital Filter Implementation. J. VLSI Signal Processing and Systems. Vol. 17, No. 1, pp:75-92.
- Yu-Chi Tsao and Ken Choi. 2012. Area Efficient Parallel FIR Digital Filter Structures for Symmetric Convolutions Based on Fast FIR algorithm. IEEE Trans. on VLSI Systems. Vol. 20, No. 2, pp:366-371.
- Zhi-Jian Mou and Pierre Duhamel. 1987. Fast FIR Filter Algorithms and Implementations. IEEE Trans. on Signal Processing. Vol. 13, No. 4, pp:377-384.
- Zhi-Jian Mou and Pierre Duhamel. 1991. Short-Length FIR Filters and their use in fast Non- Recursive Filtering. IEEE Trans. on Signal Processing. Vol. 39, No. 6, pp:1322-1332.
Index Terms
Keywords