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A High Slew Rate Buffer Amplifier Employing MTCMOS Technique for Flat Panel Display

by Ajay Yadav, Saurabh Khandelwalb, Shyam Akashe
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International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 94 - Number 13
Year of Publication: 2014
Authors: Ajay Yadav, Saurabh Khandelwalb, Shyam Akashe
10.5120/16405-6104

Ajay Yadav, Saurabh Khandelwalb, Shyam Akashe . A High Slew Rate Buffer Amplifier Employing MTCMOS Technique for Flat Panel Display. International Journal of Computer Applications. 94, 13 ( May 2014), 30-35. DOI=10.5120/16405-6104

@article{ 10.5120/16405-6104,
author = { Ajay Yadav, Saurabh Khandelwalb, Shyam Akashe },
title = { A High Slew Rate Buffer Amplifier Employing MTCMOS Technique for Flat Panel Display },
journal = { International Journal of Computer Applications },
issue_date = { May 2014 },
volume = { 94 },
number = { 13 },
month = { May },
year = { 2014 },
issn = { 0975-8887 },
pages = { 30-35 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume94/number13/16405-6104/ },
doi = { 10.5120/16405-6104 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T22:17:34.801631+05:30
%A Ajay Yadav
%A Saurabh Khandelwalb
%A Shyam Akashe
%T A High Slew Rate Buffer Amplifier Employing MTCMOS Technique for Flat Panel Display
%J International Journal of Computer Applications
%@ 0975-8887
%V 94
%N 13
%P 30-35
%D 2014
%I Foundation of Computer Science (FCS), NY, USA
Abstract

This paper address a low power, high speed class AB buffer amplifier topology for liquid crystal display applications which offer a rail to rail common mode input range. The presented circuit use two comparator circuit inside it to enhance the slewing capabilities with a limited power consumption and it draw a very small quiescent current during static operation for rail to rail common mode input range. The circuit describes here the capacitive load behaviour with reduced distortion at the output node for swing characteristics. By applying MTCMOS (Multi threshold CMOS) reduction technique leakage current is reduced from 56nA to 52nA, power is reduced from 377. 3 pW to 221pW, reduced slew rate and tranconductance of 4. 363. A buffer circuit can run 1nF of load capacitance of achieving a rise time 800E-12, duty cycle is 4. 5, Average group delay is 221E-3, unity gain frequency is 221. 7E-3 and harmonic frequency is 1. 532 at 20 Hz. The circuit has been demonstrated at 45 nm technology.

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Index Terms

Computer Science
Information Sciences

Keywords

Amplifier Buffer circuit Driver circuit Settling time Slew rate.

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