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Reversible Architecture of Computer Arithmetic

by Sayeeda Sultana, Katarzyna Radecka
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International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 93 - Number 14
Year of Publication: 2014
Authors: Sayeeda Sultana, Katarzyna Radecka
10.5120/16281-5852

Sayeeda Sultana, Katarzyna Radecka . Reversible Architecture of Computer Arithmetic. International Journal of Computer Applications. 93, 14 ( May 2014), 6-14. DOI=10.5120/16281-5852

@article{ 10.5120/16281-5852,
author = { Sayeeda Sultana, Katarzyna Radecka },
title = { Reversible Architecture of Computer Arithmetic },
journal = { International Journal of Computer Applications },
issue_date = { May 2014 },
volume = { 93 },
number = { 14 },
month = { May },
year = { 2014 },
issn = { 0975-8887 },
pages = { 6-14 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume93/number14/16281-5852/ },
doi = { 10.5120/16281-5852 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T22:15:42.840861+05:30
%A Sayeeda Sultana
%A Katarzyna Radecka
%T Reversible Architecture of Computer Arithmetic
%J International Journal of Computer Applications
%@ 0975-8887
%V 93
%N 14
%P 6-14
%D 2014
%I Foundation of Computer Science (FCS), NY, USA
Abstract

Reversible logic plays an important role in emerging low power designs and quantum computing. This paper presents an efficient way to realize reversible arithmetic circuits especially targeting toward reversible arithmetic logic unit (RALU). In literature for reversible logic, not a significant advancement is found in integrating both logical and arithmetical functions, commonly known as arithmetic logic unit (ALU), a key feature of any computing system architecture. Here, this work presents a novel reversible arithmetic logic unit (ALU) performing basic functions similar to classical ALU such as addition, subtraction, AND, OR and XOR operations. Additional functions such as, NAND, NOR, XNOR and logical functions with single input inverted, overflow detection and comparison can also be performed with this design. The integration of these operations in single module using less number of control signals is not available in any of existing approaches. The design and analysis based on different parameters of reversible circuits – number of gates, garbage bits and quantum cost as well as simulation results are presented here. The proposed design offers efficient programmability and more flexibility than other methods.

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Index Terms

Computer Science
Information Sciences

Keywords

Arithmetic logic unit Reversible logic Reversible controlled adder/subtractor Quantum cost.

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