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VHDL based Hardware Architecture of a High Performance Image Edge Detection Algorithm

by Hanene Rouabeh, Chokri Abdelmoula, Mohamed Masmoudi
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International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 91 - Number 12
Year of Publication: 2014
Authors: Hanene Rouabeh, Chokri Abdelmoula, Mohamed Masmoudi
10.5120/15935-5208

Hanene Rouabeh, Chokri Abdelmoula, Mohamed Masmoudi . VHDL based Hardware Architecture of a High Performance Image Edge Detection Algorithm. International Journal of Computer Applications. 91, 12 ( April 2014), 37-43. DOI=10.5120/15935-5208

@article{ 10.5120/15935-5208,
author = { Hanene Rouabeh, Chokri Abdelmoula, Mohamed Masmoudi },
title = { VHDL based Hardware Architecture of a High Performance Image Edge Detection Algorithm },
journal = { International Journal of Computer Applications },
issue_date = { April 2014 },
volume = { 91 },
number = { 12 },
month = { April },
year = { 2014 },
issn = { 0975-8887 },
pages = { 37-43 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume91/number12/15935-5208/ },
doi = { 10.5120/15935-5208 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T22:12:35.365910+05:30
%A Hanene Rouabeh
%A Chokri Abdelmoula
%A Mohamed Masmoudi
%T VHDL based Hardware Architecture of a High Performance Image Edge Detection Algorithm
%J International Journal of Computer Applications
%@ 0975-8887
%V 91
%N 12
%P 37-43
%D 2014
%I Foundation of Computer Science (FCS), NY, USA
Abstract

This article presents the software and hardware implementation of a low cost and high performance image edge detection algorithm. This algorithm will be used as part of a complete vision based driver assistance system. The main challenge consists in realizing a real-time implementation of edge detection algorithm that contributes in increasing the performance of the whole system. The software implementation of the developed algorithm using MATLAB tool is discussed in this paper, as well as the hardware architecture developed using VHDL language. Test results for both implementations were presented and compared to other edge detection operators. Computational time and other features comparison have shown the effectiveness of the proposed approach.

References
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Index Terms

Computer Science
Information Sciences

Keywords

Image processing Edge detection VHDL implementation FPGA

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