International Journal of Computer Applications |
Foundation of Computer Science (FCS), NY, USA |
Volume 88 - Number 7 |
Year of Publication: 2014 |
Authors: Gulrej Ahmed, Rajendra Kumar Baghel |
10.5120/15367-3874 |
Gulrej Ahmed, Rajendra Kumar Baghel . A Variable Threshold Voltage CMOS Comparator for Flash Analog to Digital Converter. International Journal of Computer Applications. 88, 7 ( February 2014), 40-43. DOI=10.5120/15367-3874
This paper presents a variable threshold voltage CMOS comparator for flash analog to digital converter. The proposed comparator has single-ended type of architecture. The comparator is designed and analyzed by Cadence Virtuoso Analog Design Environment using UMC 180nm technology. The proposed comparator consumes peak power of 34. 97 ?W from 1. 8 V power supply. It achieves the power delay product (PDP) of 8 fJ and propagation delay of 230 ps. The designed comparator eliminates the requirement of resistive ladder network for reference voltage generation. This makes it highly suitable in the design of flash analog to digital converter.