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STG-NoC: A Tool for Generating Energy Optimized Custom Built NoC Topology

by Surbhi Jain, Naveen Choudhary, Dharm Singh
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International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 85 - Number 15
Year of Publication: 2014
Authors: Surbhi Jain, Naveen Choudhary, Dharm Singh
10.5120/14918-3481

Surbhi Jain, Naveen Choudhary, Dharm Singh . STG-NoC: A Tool for Generating Energy Optimized Custom Built NoC Topology. International Journal of Computer Applications. 85, 15 ( January 2014), 22-26. DOI=10.5120/14918-3481

@article{ 10.5120/14918-3481,
author = { Surbhi Jain, Naveen Choudhary, Dharm Singh },
title = { STG-NoC: A Tool for Generating Energy Optimized Custom Built NoC Topology },
journal = { International Journal of Computer Applications },
issue_date = { January 2014 },
volume = { 85 },
number = { 15 },
month = { January },
year = { 2014 },
issn = { 0975-8887 },
pages = { 22-26 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume85/number15/14918-3481/ },
doi = { 10.5120/14918-3481 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T22:02:33.172156+05:30
%A Surbhi Jain
%A Naveen Choudhary
%A Dharm Singh
%T STG-NoC: A Tool for Generating Energy Optimized Custom Built NoC Topology
%J International Journal of Computer Applications
%@ 0975-8887
%V 85
%N 15
%P 22-26
%D 2014
%I Foundation of Computer Science (FCS), NY, USA
Abstract

Network on Chip (NoC) has emerged as a viable solution to the complex communication requirements of constantly evolving System on Chip (SoC). The communication centric architecture of NoC can be optimized across a variety of parameters as per the design requirements. With the development of customized application the inclination has shifted from regular architectures to irregular topology which leaves researchers with larger spectrum of optimization parameters. Many heuristic methods have been explored as the optimization problems encountered are NP-hard. This paper presents a customized topology generator STG-NoC which implements a heuristic technique based on simulated annealing for achieving the objective of energy optimization.

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Index Terms

Computer Science
Information Sciences

Keywords

Customized Network-on-Chip (NoC) Energy optimization Simulated Annealing (SA) STG-NoC (Simulated Annealing based Topology Generator for Network on Chip).

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