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Design and Performance Estimation of low Power Frequency Divider in 45nm CMOS Technology

by Priyambodh Dubey, Anshul Saxena, Shyam Akashe
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International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 82 - Number 7
Year of Publication: 2013
Authors: Priyambodh Dubey, Anshul Saxena, Shyam Akashe
10.5120/14128-1832

Priyambodh Dubey, Anshul Saxena, Shyam Akashe . Design and Performance Estimation of low Power Frequency Divider in 45nm CMOS Technology. International Journal of Computer Applications. 82, 7 ( November 2013), 19-22. DOI=10.5120/14128-1832

@article{ 10.5120/14128-1832,
author = { Priyambodh Dubey, Anshul Saxena, Shyam Akashe },
title = { Design and Performance Estimation of low Power Frequency Divider in 45nm CMOS Technology },
journal = { International Journal of Computer Applications },
issue_date = { November 2013 },
volume = { 82 },
number = { 7 },
month = { November },
year = { 2013 },
issn = { 0975-8887 },
pages = { 19-22 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume82/number7/14128-1832/ },
doi = { 10.5120/14128-1832 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T21:57:09.394817+05:30
%A Priyambodh Dubey
%A Anshul Saxena
%A Shyam Akashe
%T Design and Performance Estimation of low Power Frequency Divider in 45nm CMOS Technology
%J International Journal of Computer Applications
%@ 0975-8887
%V 82
%N 7
%P 19-22
%D 2013
%I Foundation of Computer Science (FCS), NY, USA
Abstract

This paper presents a low power low voltage CMOS frequency divider using power gating technique, that's why it reduces the overall power consumption of circuit and increases the efficiency of circuit. This paper demonstrate various parameters and shows reduced leakage power (0. 45*10 12), Delay (6. 26 psec) and noise margin (11. 53 dB) of the circuit to analyze its performance in 45nm technology with power gating technology. The simulation results were done with cadence tool virtuoso environment at room temperature 27ºC with various supply voltage ranges (0. 7 to 1. 2 V).

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Index Terms

Computer Science
Information Sciences

Keywords

Frequency divider power gating technique leakage power Delay Noise margin.

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