The week's pick
Reseach Article
Fair Chance Round Robin Arbiter
| International Journal of Computer Applications |
| Foundation of Computer Science (FCS), NY, USA |
| Volume 81 - Number 14 |
| Year of Publication: 2013 |
| Authors: Prateek Karanpuria |
10.5120/14187-2446
|
Prateek Karanpuria . Fair Chance Round Robin Arbiter. International Journal of Computer Applications. 81, 14 ( November 2013), 36-40. DOI=10.5120/14187-2446
Abstract
With the advancement of Network-on-chip (NoC), fast and fair arbiter as the basic building block for high speed switches/routers gained attention in recent years. In this paper I propose the fair chance round robin arbiter (FCRRA), a high speed, low power and area efficient RRA for NoC applications. The FCRRAG tool propose in this paper can generate a design for bus arbiter, which can handle the exact number of bus masters for both on chip and off chip buses within one short cycle.
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