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Reseach Article

Power Efficient Design of Multiplexer based Compressor using Adiabatic Logic

by Richa Singh, Anjali Sharma, Rohit Singh
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 81 - Number 10
Year of Publication: 2013
Authors: Richa Singh, Anjali Sharma, Rohit Singh
10.5120/14052-2217

Richa Singh, Anjali Sharma, Rohit Singh . Power Efficient Design of Multiplexer based Compressor using Adiabatic Logic. International Journal of Computer Applications. 81, 10 ( November 2013), 45-50. DOI=10.5120/14052-2217

@article{ 10.5120/14052-2217,
author = { Richa Singh, Anjali Sharma, Rohit Singh },
title = { Power Efficient Design of Multiplexer based Compressor using Adiabatic Logic },
journal = { International Journal of Computer Applications },
issue_date = { November 2013 },
volume = { 81 },
number = { 10 },
month = { November },
year = { 2013 },
issn = { 0975-8887 },
pages = { 45-50 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume81/number10/14052-2217/ },
doi = { 10.5120/14052-2217 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T21:55:45.237504+05:30
%A Richa Singh
%A Anjali Sharma
%A Rohit Singh
%T Power Efficient Design of Multiplexer based Compressor using Adiabatic Logic
%J International Journal of Computer Applications
%@ 0975-8887
%V 81
%N 10
%P 45-50
%D 2013
%I Foundation of Computer Science (FCS), NY, USA
Abstract

Demand of low power circuits design is increasing due to the large growth in portable digital equipment. In this reference adiabatic structure are used that provides a dramatic reduction in power dissipation by recycling some of the energy from output load capacitor and saving power in upper half of the network instead of dissipated as heat. In this paper a low power multiplexer based 4-2 compressor is designed using Positive feedback adiabatic logic. The compressor design is simulated at 0. 12µm technology using Microwind 3. 1. Simulated results shows that proposed design saves 54. 9% power than conventional CMOS based compressor.

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Index Terms

Computer Science
Information Sciences

Keywords

BSIM CMOS VLSI PFAL Multiplexer.