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Reseach Article

Dynamic Partial based Single Event Upset (SEU) Injection Platform on FPGA

by Reza Omidi Gosheblagh, Karim Mohammadi
International Journal of Computer Applications
Foundation of Computer Science (FCS), NY, USA
Volume 76 - Number 3
Year of Publication: 2013
Authors: Reza Omidi Gosheblagh, Karim Mohammadi
10.5120/13227-0653

Reza Omidi Gosheblagh, Karim Mohammadi . Dynamic Partial based Single Event Upset (SEU) Injection Platform on FPGA. International Journal of Computer Applications. 76, 3 ( August 2013), 19-24. DOI=10.5120/13227-0653

@article{ 10.5120/13227-0653,
author = { Reza Omidi Gosheblagh, Karim Mohammadi },
title = { Dynamic Partial based Single Event Upset (SEU) Injection Platform on FPGA },
journal = { International Journal of Computer Applications },
issue_date = { August 2013 },
volume = { 76 },
number = { 3 },
month = { August },
year = { 2013 },
issn = { 0975-8887 },
pages = { 19-24 },
numpages = {9},
url = { https://ijcaonline.org/archives/volume76/number3/13227-0653/ },
doi = { 10.5120/13227-0653 },
publisher = {Foundation of Computer Science (FCS), NY, USA},
address = {New York, USA}
}
%0 Journal Article
%1 2024-02-06T21:44:56.136497+05:30
%A Reza Omidi Gosheblagh
%A Karim Mohammadi
%T Dynamic Partial based Single Event Upset (SEU) Injection Platform on FPGA
%J International Journal of Computer Applications
%@ 0975-8887
%V 76
%N 3
%P 19-24
%D 2013
%I Foundation of Computer Science (FCS), NY, USA
Abstract

SRAM based FPGAs are attracting considerable interest especially in aerospace applications due to their high re-configurability, low cost and availability. However, these devices are strongly susceptible to space radiation effects which are able to cause unwanted single event upsets (SEUs) in the configuration memory. In order to mitigate the SEU effects, various methods have been investigated in literatures. Fault injection methods are required to evaluate the efficiency of the hardening techniques. This paper has proposed a dynamic partial reconfiguration based fault-injection platform (DPR-FIP) for emulating the SEU faults in FPGA configuration memory. Besides the SEU faults, DPRFIP tool supports cumulative SEU, multi-event upset, and single event transient faults in combinational parts and flip-flops.

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Index Terms

Computer Science
Information Sciences

Keywords

Single Event Effects (SEU) FPGA Fault injection Emulation Radiation Effects DPRFIP Tool